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MIC2551A-2.5 Datasheet(PDF) 8 Page - Micrel Semiconductor |
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MIC2551A-2.5 Datasheet(HTML) 8 Page - Micrel Semiconductor |
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8 / 10 page ![]() MIC2551A-2.5 Micrel, Inc. M9999-031306 8 March 2006 Power Supply Configuration The MIC2551A can be set up for different power supply configurations which modify the behavior of the device. Both VBUS and VIF have special thresholds that detect when they are either removed or grounded. Table 1 depicts the behavior under the different power supply configuration scenarios that are explained below. Normal Mode VBUS is connected to the 5.0V USB bus voltage and VIF is connected to a supply voltage in the range of 1.6V to 3.6V. In thiscaseVTRMsuppliesa3.3Vvoltageforpoweringthespeed select resistor via VPU depending on the state of CON pin. Disconnect Mode VIF is connected to a supply in a range of 1.6V to 3.6V and VBUSisopenorgrounded.IfVBUSisopenedwhiletransmitting, the data lines (D+, D–) have sharing capability and may be driven with external devices up to approximately 3.6V if and only if SUSPEND is enabled (SUS = 1). With VBUS ground, D+, D– sharing mode is not permitted. Disable Mode VBUS is connected to the 5.0V USB bus voltage and VIF is open. All logic controlled inputs become high impedances, thus minimal current will be supplied by VIF if the input pins are pulled up to an external source. Alternate Power Supply Configuration Options I/O Interface Using 3.3V In systems where the I/O interface utilizes a 3.3V USB con- troller, an alternate solution is shown in Figure 7. No extra components are required; however, the load on VTRM must not exceed 10mA. MIC2551A VIF VBUS I/O VBUS VP/VM/ RCV/OE# VTRM USB Controller VDD 3.3V Figure 7. I/O Interface Using 3.3V Bypass Input VBUS and VTRM are tied together to a supply voltage in the range of 3.0V to 3.6V. The internal regulator is bypassed and the internal circuitry is run from the VTRM input. See Figure 8. MIC2551A VIF 3.3V VBUS VTRM Figure 8. Powering MIC2551A from External 3.3V Signal Amplitude Respective to VIF When operating the MIC2551A, it is necessary to provide input signals which do not exceed VIF + 0.3V. Suspend When the suspend pin (SUS) is high, power consumption is reduced to a minimum. VTRM is not disabled. RCV, VP and VM are still functional to enable the device to detect USB activity. For minimal current consumption in suspend mode, it is recommended that OE# = 1, and SPD = 0. Speed The speed pin (SPD) sets D+/D– output edge rates by in- creasing or decreasing biasing current sources within the output drivers. For low speed, SPD = 0. For full speed, SPD = 1. By setting SPD = 0 during idle periods, in conjunction with suspend (SUS), the lowest quiescent current can be obtained. However, designers must provide a 300ns delay between changing SPD from 0 to 1 and transmission of data at full speed. This delay ensures the output drivers have ar- rived at their proper operating conditions. Failure to do so can result in leading edge distortion on the first few data bits transmitted. Non-Multiplexed Bus InordertosavepincountfortheUSBlogiccontrollerinterface, the MIC2551Awas designed with VPand VM as bi-directional pins. To interface the MIC2551A with a non-multiplexed data bus, resistors can be used for low cost isolation, as shown in Figure 9. VPO VP VM VMO USB Logic Controller (SIE) MIC2551A VP VM 10k 10k Figure 9. MIC2551A Interface to Non-Multiplexed Data Bus |
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