TMP93CS44 datasheet(75/224 Pages) TOSHIBA

75 / 224 page

TMP93CS44/S45

2004-02-10

93CS44-73

3.6.2

Address/Data Bus Pins

Port 0/AD0 to AD7, port 1/AD8 to AD15/A8 to A15 and port 2/A16 to A23/A0 to A7

function as address/data bus for connecting the external memories and so on.

(1)

(2)

(3)

(4)

Products

TMP93CS45F (Note 4)

TMP93CS44F (Note 2), (Note 3)

Number of Address Bus

Pins

Max 24 (to 16 Mbytes) Max 24 (to 16 Mbytes) Max 16 (to 64 Kbytes)

Max 8 (to 256 bytes)

Number of Data Bus

Pins

Number of Multiplexed

Pins

VIL

VIH

Mode Pins

AM8/

VIH

VIL

VIH

Port 0

AD0 to AD7

Port 1

A8 to A15

AD8 to AD15

A8 to A15

AD8 to AD15

Port

Function

Port 2

A16 to A23

A0 to A7

Timing Chart

Note 1: In case of (3) and (4), the data bus signals output the addresses since the signals are

also used as the address bus. Writing “0” to bit CKOCR<ALEEN>, ALE signal can be

stopped outputting.

Note 2: After reset operation, port 0, port 1 and port 2 of TMP93CS44F function as input

ports.

Note 3: In case of TMP93CS44F, all (1) to (4) can be available using P1CR, P1FC, P2CR

and P2FC registers.

Note 4: In case of TMP93CS45F, case (3) and (4) cannot be available.

A23 to 8

AD7 to 0

to 0

ALE

A23 to 16

AD15 to 0

A15

to 0

ALE

D15

to 0

A7 to 0

AD15 to 0

A15

to 0

ALE

D15

to 0

(Note 1)

A15 to 0

AD7 to 0

to 0

ALE

(Note 1)

TMP93CS44 Datasheet(PDF) 75 Page - Toshiba Semiconductor

TMP93CS44 Datasheet(HTML) 75 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL