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TMP93CS44 Datasheet(PDF) 23 Page - Toshiba Semiconductor |
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TMP93CS44 Datasheet(HTML) 23 Page - Toshiba Semiconductor |
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23 / 224 page  TMP93CS44/S45 2004-02-10 93CS44-21 (2) Clock gear controller When the high-frequency clock fc is selected at SYSCR1<SYSCK> = “0”, the clock gear select register SYSCR1<GEAR2:0> sets fFPH to either fc, fc/2, fc/4, fc/8, fc/16. Switching fFPH with the clock gear reduces the power consumption. Clock setting example 3: Changing gear value of the high-frequency clock SYSCR1 EQU 006FH LD (SYSCR1), XXXX0000B ; Changes fSYS to fc/2. LD (SYSCR1), XXXX0100B ; Changes fSYS to fc/32. X: Don’t care (High-frequency clock gear changing) To change the frequency of the clock gear, write the value to SYSCR1<GEAR2:0> register. It is necessary to continue the warm-up time until changing after writing the register value. There is a possibility that the instruction next to the clock gear changing instruction is executed by the clock gear before changing. To execute the instruction next to the clock gear changing instruction by the clock gear after changing, input the dummy instruction (Instruction to execute the write cycle) as follows. Example: SYSCR1 EQU 006FH LD (SYSCR1), XXXX0001B ; Changes fSYS to fc/4. LD (DUMMY), 00H ; Dummy instruction. X: Don’t care Instruction to be executed by the clock gear after changing |
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