STPM32_V02 datasheet(51/89 Pages) STMICROELECTRONICS

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Row bit position

Name

Description

Default value

Break on error

Enable/disable the operation to send break frame in case

of error

Noise detection enable

Enable/disable error detection based on noise immunity

algorithm

[7:0]

CRCPolynomial

Polynomial used to validate transmitted and received data

0x07

•

Timeout: any communication session should be completed within this configurable time threshold (ms). If

the timeout value is zero this threshold is disabled. If timeout expires, the reception and the transmission

processes stop and, if enabled, a BREAK character is transmitted to warn the master about the error.

Packet processing can resume only after that BREAK transmission has been completed and an IDLE

frame has been received.

•

Break on error: if an error occurs (framing/noise/timeout/RX overrun) a BREAK command is transmitted to

the master.

•

Noise error detection. An oversampling technique is implemented to raise the noise level immunity:

received bit value is accomplished taking in account the value of three samples, and applying to them the

majority rule. This noise immunity algorithm is automatically enabled: if “noise detection enable” bit is set,

all samples must have the same value to get a valid bit reception. In this case, when noise is detected

within a frame, a noise detection error is issued and the whole packet is discarded.

•

CRCPolynomial: default polynomial used is 0x07 (x8+x2+x+1).

CRC, in case of UART, has to be calculated on the reversed byte frame, because of the internal structure of

UART blocks.

For example, if the frame to transmit is 04_03_CD_AB, CRC should be calculated on the frame:

20_C0_B3_D5 -> CRC = 0x16

The frame to send is: 04_03_CD_AB with the reversed CRC = 68.

Note:

For UART peripheral, CRC byte is sent reversed only.

Table 30. UART control register US_REG2

Row bit position

Name

Description

Default value

[23:16]

Frame delay

TX frame-to-frame delay [bit periods]

[15:0]

Baud rate

Fractional baud rate generation

0x0683

•

Frame delay: delay (expressed as bit periods) in transmitted frames. The bit period depends on the baud

rate divider selection (see below).

•

Baud rate: set to 9600 default value, the communication baud rate can be programmed in this configuration

where a main clock frequency is 16 MHz, BR is the desired baud rate and BRDIV is the theoretical value of

fractional divider:

Equation 19

BRDIV= MainClockFrequency

16∙CommunicationBaudRate

=16∙10616∙BR

(19)

Equation 20

BRRI= BRDIV =intBRDIV

(20)

Equation 21

BRRF=round16∙ BRDIV−BRRI

(21)

where BRRI are bits [15:4] and BRRF are bits [3:0] of the register. According to the chosen baud rate divider the

bit period is:

Equation 22

BitPeriod= 16∙BRRI+BRRF ∙MClkPeriod

(22)

Table 31 summarizes the above calculation of the register value to select some typical baud rates:

STPM32, STPM33, STPM34

Communication protocol

DS10272 - Rev 13

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