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PSD913F2 Datasheet(PDF) 16 Page - STMicroelectronics |
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PSD913F2 Datasheet(HTML) 16 Page - STMicroelectronics |
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16 / 94 page ![]() PSD9XX Family Preliminary Information 12 Table 5. PSD9XX Pin Descriptions (cont.) Pin Name Pin* Type Description (PLCC) PC2 18 I/O PC2 pin of Port C. This port pin can be configured to have the following functions: 1. MCU I/O — write to or read from a standard output or input port. 2. Input to the PLDs. 3. Vstby — SRAM standby voltage input for SRAM battery backup. This pin can be configured as a CMOS or Open Drain output. PC3 17 I/O PC3 pin of Port C. This port pin can be configured to have the following functions: 1. MCU I/O — write to or read from a standard output or input port. 2. Input to the PLDs. 3. TSTAT output for the JTAG interface. 4. Rdy/Bsy output for in-system parallel programming. This pin can be configured as a CMOS or Open Drain output. PC4 14 I/O PC4 pin of Port C. This port pin can be configured to have the following functions: 1. MCU I/O — write to or read from a standard output or input port. 2. Input to the PLDs. 3. TERR output for the JTAG interface. 4. Vbaton — battery backup indicator output. Goes high when power is being drawn from an external battery. This pin can be configured as a CMOS or Open Drain output. PC5 13 I/O PC5 pin of Port C. This port pin can be configured to have the following functions: 1. MCU I/O — write to or read from a standard output or input port. 2. Input to the PLDs. 3. TDI input for the JTAG interface. This pin can be configured as a CMOS or Open Drain output. PC6 12 I/O PC6 pin of Port C. This port pin can be configured to have the following functions: 1. MCU I/O — write to or read from a standard output or input port. 2. Input to the PLDs. 3. TDO output for the JTAG interface. This pin can be configured as a CMOS or Open Drain output. |
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