H8SXSLASH1663 datasheet(1041/1158 Pages) RENESAS

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Section 23 Power-Down Modes

Rev.1.00 Jun. 07, 2006 Page 989 of 1102

REJ09B0294-0100

23.9

Sleep Instruction Exception Handling

Sleep instruction exception handling is exception handling initiated by the execution of a SLEEP

instruction. Sleep instruction exception handling is always accepted while the program is in

execution.

When the SLPIE bit is set to 0, the execution of a SLEEP instruction does not initiate sleep

instruction exception handling. Instead, the CPU enters the power-down state. After this,

generation of an exception handling request that cancels the power-down state causes the power-

down state to be canceled, after which the CPU starts to handle the exception. When the SLPIE bit

is set to 1, sleep instruction exception handling starts after the execution of a SLEEP instruction.

Transitions to the power-down state are inhibited when sleep instruction exception handling is

initiated, and the CPU immediately starts sleep instruction exception handling.

When a SLEEP instruction is executed while the SLPIE bit is cleared to 0, a transition is made to

the power-down state. The power-down state is canceled by a canceling factor interrupt (see figure

23.5).

When a canceling factor interrupt is generated immediately before the execution of a SLEEP

instruction, exception handling for the interrupt starts. When execution returns from the interrupt

handling routine, the SLEEP instruction is executed to enter the power-down state. In this case,

the power-down state is not canceled until the next canceling factor interrupt is generated (see

figure 23.6).

When the SLPIE bit is set to 1 in the handling routine for a canceling factor interrupt so that the

execution of a SLEEP instruction will produce sleep instruction exception handling, the operation

of the system is as shown in figure 23.7. Even if a canceling factor interrupt is generated

immediately before the SLEEP instruction is executed, sleep instruction exception handling is

initiated by execution of the SLEEP instruction. Therefore, the CPU executes the instruction that

follows the SLEEP instruction after sleep instruction exception and exception service routine

without shifting to the power-down state.

When the SLPIE bit is set to 1 to start sleep exception handling, clear the SSBY bit in SBYCR

to 0.

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