H8SXSLASH1663 datasheet(1045/1158 Pages) RENESAS

1045 / 1158 page

Section 23 Power-Down Modes

Rev.1.00 Jun. 07, 2006 Page 993 of 1102

REJ09B0294-0100

23.11

Usage Notes

23.11.1

I/O Port Status

In software standby mode, the I/O port states are retained. Therefore, there is no reduction in

current consumption for the output current when a high-level signal is output.

23.11.2

Current Consumption during Oscillation Settling Standby Period

Current consumption increases during the oscillation settling standby period.

23.11.3

Module Stop Mode of DMAC or DTC

Depending on the operating state of the DMAC and DTC, bits MSTPA13 and MSTPA12 may not

be set to 1, respectively. The module stop state setting for the DMAC or DTC should be

performed only when the DMAC or DTC is not activated.

For details, refer to section 7, DMA Controller (DMAC), and section 8, Data Transfer Controller

(DTC).

23.11.4

On-Chip Peripheral Module Interrupts

Relevant interrupt operations cannot be performed in the module stop state. Consequently, if the

module stop state is entered when an interrupt has been requested, it will not be possible to clear

the CPU interrupt source or the DMAC or DTC activation source. Interrupts should therefore be

disabled before entering the module stop state.

23.11.5

Writing to MSTPCRA, MSTPCRB, and MSTPCRC

MSTPCRA, MSTPCRB, and MSTPCRC should only be written to by the CPU.

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