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H8SX/1663R Datasheet(PDF) 974 Page - Renesas Technology Corp |
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H8SX/1663R Datasheet(HTML) 974 Page - Renesas Technology Corp |
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974 / 1504 page  Section 19 Serial Communication Interface (SCI, IrDA, CRC) Rev. 2.00 Sep. 24, 2008 Page 942 of 1468 REJ09B0412-0200 D0 D1 D2 D3 D4 D5 D6 D7 Dp DE Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp (DE) Ds D0 D1 D2 D3 D4 Ds (n + 1) th transfer frame Retransfer frame nth transfer frame TDRE TEND [1] FER/ERS Transfer from TDR to TSR Transfer from TDR to TSR Transfer from TDR to TSR [2] [4] [3] Figure 19.29 Data Re-Transfer Operation in SCI Transmission Mode Note that the TEND flag is set in different timings depending on the GM bit setting in SMR. Figure 19.30 shows the TEND flag set timing. Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp I/O data 12.5 etu TXI (TEND interrupt) 11.0 etu DE Guard time GM = 0 GM = 1 [Legend] Ds: Start bit D0 to D7: Data bits Dp: Parity bit DE: Error signal Figure 19.30 TEND Flag Set Timing during Transmission |
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