H8SXSLASH1663R datasheet(1003/1504 Pages) RENESAS

1003 / 1504 page

Section 20 USB Function Module (USB)

Rev. 2.00 Sep. 24, 2008 Page 971 of 1468

REJ09B0412-0200

Bit

Bit Name

Initial

Value

R/W

Description

VBUSF

R/W

USB Disconnection Detection

When the function is connected to the USB bus or

disconnected from it, this bit is set to 1. The VBUS pin

of this module is used for detecting connection or

disconnection.

(When the CPU is used to clear this flag by writing 0

while the corresponding interrupt is enabled, be sure to

read the flag after writing 0 to it.)

20.3.3

Interrupt Flag Register 2 (IFR2)

IFR2, together with interrupt flag registers 0 and 1 (IFR0 and IFR1), indicates interrupt status

information required by the application. When an interrupt source is generated, the corresponding

bit is set to 1. And then this bit, in combination with interrupt enable register 2 (IER2), generates

an interrupt request to the CPU. To clear, write 0 to the bit to be cleared and 1 to the other bits.

Bit

Bit Name

Initial Value

R/W



SURSS

SURSF

R/W

CFDN

R/W



SETC

R/W

SETI

R/W

Bit

Bit Name

Initial

Value

R/W

Description

—

Reserved

These bits are always read as 0. The write value

should always be 0.

SURSS

Suspend/Resume Status

This is a status bit that describes bus state.

0: Normal state

1: Suspended state

This bit is a status bit and generates no interrupt

request.

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