ADE5166 datasheet(26/148 Pages) AD

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ADE5166/ADE5169

Rev. 0 | Page 26 of 148

Table 22. Scratch Pad 2 SFR (SCRATCH2, Address 0xFC)

Bit

Mnemonic

Default

Description

[7:0]

SCRATCH2

Value can be written/read in this register. This value is maintained in all the power saving modes.

Table 23. Scratch Pad 3 SFR (SCRATCH3, Address 0xFD)

Bit

Mnemonic

Default

Description

[7:0]

SCRATCH3

Value can be written/read in this register. This value is maintained in all the power saving modes.

Table 24. Scratch Pad 4 SFR (SCRATCH4, Address 0xFE)

Bit

Mnemonic

Default

Description

[7:0]

SCRATCH4

Value can be written/read in this register. This value is maintained in all the power saving modes.

Clearing the Scratch Pad Registers (SCRATCH1, Address 0xFB to SCRATCH4, Address 0xFE)

Note that these scratch pad registers are cleared only when the part loses VDD and VBAT.

Table 25. Power Control SFR (POWCON, Address 0xC5)

Bit

Mnemonic

Default

Description

Reserved

Reserved.

METER_OF

Set this bit to turn off the modulators and energy metering DSP circuitry to reduce power if metering

functions are not needed in PSM0.

Reserved

This bit should be kept at 0 for proper operation.

COREOFF

Set this bit to shut down the core and enter PSM2 mode if in the PSM1 operating mode.

Reserved

Reserved.

[2:0]

010

Controls the core clock frequency, fCORE. fCORE = 4.096 MHz/2CD.

Result (fCORE in MHz)

000

4.096

001

2.048

010

1.024

011

0.512

100

0.256

101

0.128

110

0.064

111

0.032

Writing to the Power Control SFR (POWCON, Address 0xC5)

Writing data to the POWCON SFR involves writing 0xA7 into the key SFR (KYREG, Address 0xC1), which is described in Table 125,

followed by a write to the POWCON SFR. For example,

MOV KYREG,#0A7h

;Write KYREG to 0xA7 to get write access to the POWCON SFR

MOV POWCON,#10h

;Shutdown the core

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