MPC5200BDS datasheet(65/72 Pages) FREESCALE

65 / 72 page

MPC5200B Data Sheet, Rev. 3

Freescale Semiconductor

The relationship between VDD_IO_MEM and VDD_IO is non-critical during power-up and power-down sequences.

VDD_IO_MEM (2.5 V or 3.3 V) and VDD_IO are specified relative to VDD_CORE.

3.1.1

Power Up Sequence

If VDD_IO/VDD_IO_MEM are powered up with the VDD_CORE at 0V, the sense circuits in the I/O pads cause all pad output

drivers connected to the VDD_IO/VDD_IO_MEM to be in a high-impedance state. There is no limit to how long after

VDD_IO/VDD_IO_MEM powers up before VDD_CORE must power up. VDD_CORE should not lead the VDD_IO,

VDD_IO_MEM or PLL_AVDD by more than 0.4 V during power ramp up or there will be high current in the internal ESD

protection diodes. The rise times on the power supplies should be slower than 1 microsecond to avoid turning on the internal

ESD protection clamp diodes.

The recommended power up sequence is as follows:

Use one microsecond or slower rise time for all supplies.

VDD_CORE/PLL_AVDD and VDD_IO/VDD_IO_MEM should track up to 0.9 V and then separate for the completion of

ramps with VDD_IO/VDD_IO_MEM going to the higher external voltages. One way to accomplish this is to use a low drop-out

voltage regulator.

3.1.2

Power Down Sequence

If VDD_CORE/PLL_AVDD are powered down first, sense circuits in the I/O pads cause all output drivers to be in a high

impedance state. There is no limit on how long after VDD_CORE and PLL_AVDD power down before VDD_IO or

VDD_IO_MEM must power down. VDD_CORE should not lag VDD_IO, VDD_IO_MEM, or PLL_AVDD going low by more

than 0.5V during power down or there will be undesired high current in the ESD protection diodes. There are no requirements

for the fall times of the power supplies.

The recommended power down sequence is as follows:

Drop VDD_CORE/PLL_AVDD to 0V.

Drop VDD_IO/VDD_IO_MEM supplies.

3.2

System and CPU Core AVDD Power Supply Filtering

Each of the independent PLL power supplies require filtering external to the device. The following drawing is a

recommendation for the required filter circuit.

Figure 52. Power Supply Filtering

3.3

Pull-up/Pull-down Resistor Requirements

The MPC5200B requires external pull-up or pull-down resistors on certain pins.

3.3.1

Pull-down Resistor Requirements for TEST pins

The MPC5200B requires pull-down resistors on the test pins TEST_MODE_0, TEST_MODE_1, TEST_SEL_1.

AVDD device pin

Power

Supply

source

< 1 W

10 W

200-400 pF

10 mF

MPC5200BDS Datasheet(PDF) 65 Page - Freescale Semiconductor, Inc

MPC5200BDS Datasheet(HTML) 65 Page - Freescale Semiconductor, Inc

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