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AT80C51RA2-RLSIV Datasheet(PDF) 67 Page - ATMEL Corporation |
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AT80C51RA2-RLSIV Datasheet(HTML) 67 Page - ATMEL Corporation |
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67 / 86 page  67 4188F–8051–01/08 AT/TS8xC51Rx2 Table 11-9. AC Parameters for a Variable Clock: derating formula 11.5.5 External Data Memory Write Cycle Figure 11-7. External Data Memory Write Cycle 11.5.6 External Data Memory Read Cycle Symbol Type Standard Clock X2 Clock -M -V -L Units TRLRH Min 6 T - x 3 T - x 20 15 25 ns TWLWH Min 6 T - x 3 T - x 20 15 25 ns TRLDV Max 5 T - x 2.5 T - x 25 23 30 ns TRHDX Min x x 0 0 0 ns TRHDZ Max 2 T - x T - x 20 15 25 ns TLLDV Max 8 T - x 4T -x 40 35 45 ns TAVDV Max 9 T - x 4.5 T - x 60 50 65 ns TLLWL Min 3 T - x 1.5 T - x 25 20 30 ns TLLWL Max 3 T + x 1.5 T + x 25 20 30 ns TAVWL Min 4 T - x 2 T - x 25 20 30 ns TQVWX Min T - x 0.5 T - x 15 10 20 ns TQVWH Min 7 T - x 3.5 T - x 15 10 20 ns TWHQX Min T - x 0.5 T - x 10 8 15 ns TRLAZ Max x x 0 0 0 ns TWHLH Min T - x 0.5 T - x 15 10 20 ns TWHLH Max T + x 0.5 T + x 15 10 20 ns TQVWH TLLAX ALE PSEN WR PORT 0 PORT 2 A0-A7 DATA OUT ADDRESS OR SFR-P2 TAVWL TLLWL TQVWX ADDRESS A8-A15 OR SFR P2 TWHQX TWHLH TWLWH |
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