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F75111RG Datasheet(PDF) 32 Page - Feature Integration Technology Inc. |
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F75111RG Datasheet(HTML) 32 Page - Feature Integration Technology Inc. |
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32 / 45 page ![]() July, 2007 V0.27P - 30 - F75111 25ms else if set to 0 de-bounce time is 7u(default). 6 DB_TIME26_SEL R/W VSB3V Select GPIO26 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). 5 DB_TIME25_SEL R/W VSB3V Select GPIO25 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). 4 DB_TIME24_SEL R/W VSB3V Select GPIO24 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). 3 DB_TIME23_SEL R/W VSB3V Select GPIO23 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). 2 DB_TIME22_SEL R/W VSB3V Select GPIO22 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). 1 DB_TIME21_SEL R/W VSB3V Select GPIO21 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). 0 DB_TIME20_SEL R/W VSB3V Select GPIO20 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). 7.36 WDTOUT Control Register – Index 34h Power-on default [7:0] =0000_0000b Bit Name R/W PWR Description 7-3 Reserved RO 2 SEL_RST_2S R/W VSB3V When set this bit to 1, the WDTOUT10 low pulse width is 2 Sec, if set to 0 the low pulse width is 100ms. 1 WDTOUT10_OIN V R/W VSB3V WDTOUT10# output level inverting. When write 1, the output pin will be inverted. Default is low active when time is out. 0 STS_WDTOUT1 0 R/W VSB3V Indicate WDTOUT10 is occurred. Write 1 to clear this bit. Writing 0 is invalid. 7.37 WDTOUT10 Control Register – Index 35h Power-on default [7:0] =0000_0000b Bit Name R/W PWR Description 7 WDT10_ENABLE R/W VSB3V Enable WDTOUT10 Output Timer. If set to 1, the WDTOUT10 timer will be started. When WDTOUT10# is asserted, low pulse is occurred. |
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