Electronic Components Datasheet Search
  British  ▼
ALLDATASHEET.CO.UK

X  

LTC1646IGN Datasheet(PDF) 7 Page - Linear Technology

Part # LTC1646IGN
Description  CompactPCI Dual Hot Swap Controller
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1646IGN Datasheet(HTML) 7 Page - Linear Technology

Back Button LTC1646IGN Datasheet HTML 3Page - Linear Technology LTC1646IGN Datasheet HTML 4Page - Linear Technology LTC1646IGN Datasheet HTML 5Page - Linear Technology LTC1646IGN Datasheet HTML 6Page - Linear Technology LTC1646IGN Datasheet HTML 7Page - Linear Technology LTC1646IGN Datasheet HTML 8Page - Linear Technology LTC1646IGN Datasheet HTML 9Page - Linear Technology LTC1646IGN Datasheet HTML 10Page - Linear Technology LTC1646IGN Datasheet HTML 11Page - Linear Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 20 page
background image
LTC1646
7
1646fa
PI FU CTIO S
3VSENSE (Pin 9): 3.3V Current Limit Set. With a sense
resistor placed in the supply path between 3VIN and
3VSENSE, the GATE pin voltage will be adjusted to maintain
a constant voltage across the sense resistor and a con-
stant current through the switch while the TIMER pin
voltage is less than 1.25V. A foldback feature makes the
current limit decrease as the voltage at the 3VOUT pin
approaches GND.
When the TIMER pin voltage exceeds 1.25V, the circuit
breaker function is enabled. If the voltage across the sense
resistor exceeds 56mV, the circuit breaker is tripped after
a 21
µs time delay. In the event the sense resistor voltage
exceeds 150mV, the circuit breaker trips immediately and
the chip latches off. To disable the 3.3V current limit,
3VSENSE and 3VIN can be shorted together.
GATE (Pin 10): High Side Gate Drive for the External 3.3V
and 5V N-Channel pass transistors. Requires an external
series RC network for the current limit loop compensation
and setting the minimum ramp-up rate. During power-up,
the slope of the voltage rise at the GATE is set by the 13
µA
current source connected to the internal charge pump and
the external capacitor connected to GND or by the 3.3V or
5V current limit and the bulk capacitance on the 3VOUT or
5VOUT supply lines. During power-down, the slope of the
ramp down voltage is set by the 200
µA current source
connected to GND and the external GATE capacitor.
The voltage at the GATE pin will be modulated to maintain
a constant current when either the 3V or 5V supplies go
into current limit while the TIMER pin voltage is less than
1.25V. If a current fault occurs after the TIMER pin voltage
exceeds 1.25V, the GATE pin is immediately pulled to
GND.
5VSENSE (Pin 11): 5V Current Limit Set. With a sense
resistor placed in the supply path between 5VIN and
5VSENSE, the GATE pin voltage will be adjusted to maintain
a constant voltage across the sense resistor and a con-
stant current through the switch while the TIMER pin
voltage is less than 1.25V. A foldback feature makes the
current limit decrease as the voltage at the 5VOUT pin
approaches GND.
When the TIMER pin voltage is greater than 1.25V, the
circuit breaker function is enabled. If the voltage across
the sense resistor exceeds 56mV but is less than 150mV,
the circuit breaker is tripped after a 21
µs time delay. In the
event the sense resistor voltage exceeds 150mV, the
circuit breaker trips immediately and the chip latches off.
To disable the 5V current limit, short 5VSENSE and 5VIN
together.
5VIN (Pin 12): 5V Supply Sense Input. An undervoltage
lockout circuit prevents the GATE pin voltage from
ramping up when the voltage at the 5VIN pin is less than
2.5V. If no 5V input supply is available, tie the 5VIN pin to
the 3VIN pin.
PRECHARGE (Pin 13): Precharge Monitor Input. An on-
chip error amplifier with a 1V reference servos the DRIVE
pin voltage to keep the precharge node at 1V. If the
precharge function is not being used, tie the PRECHARGE
pin to GND.
DRIVE (Pin 14): Precharge Base Drive Output. Provides
base drive for an external NPN emitter-follower which in
turn biases the PRECHARGE node. If the precharge func-
tion is not being used, allow the DRIVE pin to float.
OFF/ON (Pin 15): Digital Input. Connect the CPCI BD_SEL#
signal to the OFF/ON pin. When the OFF/ON pin is pulled
low, the GATE pin is pulled high by a 13
µA current source.
When the OFF/ON pin is pulled high the GATE pin will be
pulled to ground by a 200
µA current source.
The OFF/ON pin is also used to reset the electronic circuit
breaker. If the OFF/ON pin is cycled high and low following
the trip of the circuit breaker, the circuit breaker is reset,
and a normal power-up sequence will occur.
RESETIN (Pin 16): Digital Input. Connect the CPCI
PCI_RST# signal to the RESETIN pin. Pulling RESETIN low
will cause the RESETOUT pin to pull low.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com