LTC1646IGN datasheet(11/20 Pages) LINER

11 / 20 page

LTC1646

1646fa

Power-Down Sequence

When BD_SEL# is pulled high, a power-down sequence

begins (Figure 3).

Internal switches are connected to each of the output

supply voltage pins to discharge the bypass capacitors to

ground. The TIMER pin (Pin 2) is immediately pulled low.

The GATE pin (Pin 10) is pulled down by a 200

µA current

source to prevent the load currents on the 3.3V and 5V

supplies from going to zero instantaneously in order to

prevent glitching the power supply voltages. When either

of the output voltages dips below its threshold, HEALTHY#

pulls high and LOCAL_PCI_RST# will be asserted low.

Once the power-down sequence is complete, the CPCI

card may be removed from the slot. During extraction, the

precharge circuit will continue to bias the bus I/O pins at

1V until the 5V and 3.3V long connector pin connections

are separated.

Timer

During a power-up sequence, a 5

µA current source is

connected to the TIMER pin and current limit faults are

ignored until the voltage exceeds 1.25V. This feature

allows the chip to power up CPCI boards with widely

varying capacitive loads on the supplies. The power-up

time for either of the two outputs is given by:

tXV

CXV

OUT

LOAD XVOUT

OUT

LIMIT XVOUT

LOAD XVOUT

()

•

–

()

= 2

(2)

Where XVOUT = 5VOUT or 3VOUT. For example, for

CLOAD(5VOUT) = 2000µF, ILIMIT = 7A, and ILOAD = 5A, the

5VOUT turn-on time will be ~10ms. By substituting the

variables in Equation 2 with the appropriate values, the

turn-on time for the 3VOUT output can also be calculated.

The timer period should be set longer than the maximum

supply turn-on time but short enough to not exceed the

maximum safe operating area of the pass transistor during

a short-circuit. The timer period for the LTC1646 is given

by:

TIMER

•.

125

(3)

As a design aid, the timer period as a function of the timing

capacitor using standard values from 0.01

µF to 1µF is

shown in Table 2.

20ms/DIV

GATE

10V/DIV

5VOUT

3VOUT

5V/DIV

TIMER

5V/DIV

BD_SEL#

5V/DIV

HEALTHY#

5V/DIV

LCL_PCI_RST#

5V/DIV

PRECHARGE

5V/DIV

1646 F02

GATE

10V/DIV

5VOUT

3VOUT

5V/DIV

TIMER

5V/DIV

BD_SEL#

5V/DIV

HEALTHY#

5V/DIV

LCL_PCI_RST#

5V/DIV

PRECHARGE

5V/DIV

10ms/DIV

1646 F03

Figure 2. Normal Power-Up Sequence

Figure 3. Normal Power-Down Sequence

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