STM32F101XC datasheet(76/106 Pages) STMICROELECTRONICS

76 / 106 page

Electrical characteristics

STM32F101xC, STM32F101xD, STM32F101xE

76/106

Doc ID 14610 Rev 7

Electromagnetic Interference (EMI)

The electromagnetic field emitted by the device is monitored while a simple application is

executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with

IEC 61967-2 standard which specifies the test board and the pin loading.

5.3.12

Absolute maximum ratings (electrical sensitivity)

Based on three different tests (ESD, LU) using specific measurement methods, the device is

stressed in order to determine its performance in terms of electrical sensitivity.

Electrostatic discharge (ESD)

Electrostatic discharges (a positive then a negative pulse separated by 1 second) are

applied to the pins of each sample according to each pin combination. The sample size

depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test

conforms to the JESD22-A114/C101 standard.

Static latch-up

Two complementary static tests are required on six parts to assess the latch-up

performance:

●

A supply overvoltage is applied to each power supply pin

●

A current injection is applied to each input, output and configurable I/O pin

These tests are compliant with EIA/JESD 78 IC latch-up standard.

Table 42.

EMI characteristics

Symbol Parameter

Conditions

Monitored

frequency band

Max vs. [fHSE/fHCLK]

Unit

8/36 MHz

SEMI

Peak level

VDD 3.3 V, TA 25 °C,

LQFP144 package

compliant with

IEC 61967-2

0.1 MHz to 30 MHz

dBµV

30 MHz to 130 MHz

130 MHz to 1 GHz

SAE EMI Level

Table 43.

ESD absolute maximum ratings

Symbol

Ratings

Conditions

Class Maximum value(1)

Based on characterization results, not tested in production.

Unit

VESD(HBM)

Electrostatic discharge

voltage (human body model)

TA +25 °C, conforming

to JESD22-A114

2000

VESD(CDM)

Electrostatic discharge

voltage (charge device model)

TA +25 °C, conforming

to JESD22-C101

500

Table 44.

Electrical sensitivities

Symbol

Parameter

Conditions

Class

Static latch-up class

TA +85 °C conforming to JESD78A

II level A

STM32F101XC Datasheet(PDF) 76 Page - STMicroelectronics

STM32F101XC Datasheet(HTML) 76 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL