MPC5643L datasheet(61/98 Pages) FREESCALE

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Electrical characteristics

MPC5643L Microcontroller Data Sheet, Rev. 3

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

3.4.1

General notes for specifications at maximum junction temperature

An estimation of the chip junction temperature, TJ, can be obtained from Equation 1:

TJ =TA +(RθJA ×PD)

Eqn. 1

where:

= ambient temperature for the package (oC)

RθJA = junction to ambient thermal resistance (

oC/W)

= power dissipation in the package (W)

The junction to ambient thermal resistance is an industry standard value that provides a quick and easy estimation of thermal

performance. Unfortunately, there are two values in common usage: the value determined on a single layer board and the value

obtained on a board with two planes. For packages such as the PBGA, these values can be different by a factor of two. Which

value is closer to the application depends on the power dissipated by other components on the board. The value obtained on a

single layer board is appropriate for the tightly packed printed circuit board. The value obtained on the board with the internal

planes is usually appropriate if the board has low power dissipation and the components are well separated.

When a heat sink is used, the thermal resistance is expressed in Equation 2 as the sum of a junction to case thermal resistance

and a case to ambient thermal resistance:

RθJA =RθJC + RθCA

Eqn. 2

where:

RθJA = junction to ambient thermal resistance (°C/W)

RθJC = junction to case thermal resistance (°C/W)

RθCA = case to ambient thermal resistance (°C/W)

Table 11. Thermal characteristics for 257 MAPBGA package1

NOTES:

1 Thermal characteristics are targets based on simulation that are subject to change per device characterization.

No.

Symbol

Parameter

Conditions

Value Unit

1RθJA

Thermal resistance junction-to-ambient

natural convection2

2 Junction-to-Ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board

meets JEDEC specification for this package.

Single layer board – 1s

TBD °C/W

2RθJA

Thermal resistance junction-to-ambient

natural convection2

Four layer board – 2s2p

TBD °C/W

5RθJB

Thermal resistance junction-to-board3

3 Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC

specification for the specified package.

—TBD °C/W

6RθJC

Thermal resistance junction-to-case4

4 Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate

temperature is used for the case temperature. Reported value includes the thermal resistance of the interface layer.

—TBD °C/W

Junction-to-package-top natural convection5

5 Thermal characterization parameter indicating the temperature difference between the package top and the junction

temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter

is written as Psi-JT.

—TBD °C/W

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