PCF2123_09 datasheet(35/55 Pages) NXP

35 / 55 page

PCF2123_2

Product data sheet

Rev. 02 — 4 December 2009

35 of 55

NXP Semiconductors

PCF2123

SPI Real time clock/calendar

The watchdog is implemented to prevent the excessive loss of time due to interface

access failure e.g. if main power is removed from a battery backed-up system during an

interface access.

Each time the watchdog period is exceeded, 1 s will be lost from the time counters. The

watchdog will trigger between 1 s and 2 s after receiving a valid subaddress.

a. Correct data transfer: read or write

b. Incorrect data transfer; read or write

Fig 27. Interface watchdog timer

001aai563

valid sub-address

running

time

counters

WD timer

data

WD timer running

time counters frozen

running

data

tw(CE) < 1 s

data

001aai564

valid sub-address

running

time

counters

WD timer

data

WD timer running

data transfer fail

WD trips

time counters frozen

running

data

1 s < tw(CE) < 2 s

data

PCF2123 Datasheet(PDF) 35 Page - NXP Semiconductors

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