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05336.R0 3/11

Page 6

PSSB05P

aPPlICatION INFORMatION

1

2

2

1

1

2

2

1

1

2

2

1

D+, D-

Rx+, Rx-

Tx+, Tx-

GND

GND

V

DD

FIGuRE 1 - uSB 3.0 PROtECtION

Six PSSB05P devices placed right at the entry point of the connector or at the individual transmission traces.

The PSSB05P provides dedicated ESD protection for each super high speed line for the USB interface. PCB

traces are not constrained by the protection devices and can be routed in a manner that best suits the de-

sign. These devices can also provide protection for USB 2.0 applications.

CIRCuIt BOaRd RECOMMENdatIONS

Circuit board layout is critical for electromagnetic compatibility protection. The following guidelines are recommended:

• The protection device should be placed near the input terminals or connectors, the device will divert the transient current

immediately before it can be coupled into the nearby traces.

• The path length between the TVS device and the protected line should be minimized.

• All conductive loops including power and ground loops should be minimized.

• The transient current return path to ground should be kept as short as possible to reduce parasitic inductance.

• Ground planes should be used whenever possible. For multilayer PCBs, use ground vias.