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R5F10RF8AFP Datasheet(PDF) 65 Page - Renesas Technology Corp |
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R5F10RF8AFP Datasheet(HTML) 65 Page - Renesas Technology Corp |
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65 / 76 page  RL78/L12 2. ELECTRICAL SPECIFICATIONS (TARGET) Page 65 of 73 R01DS0157EJ0001 Rev.0.01 2012.02.20 Under development Preliminary document Specifications in this document are tentative and subject to change. Caution The pins mounted depend on the product. Refer to 1.3.1 32-pin products to 1.3.5 64-pin products. 2.8 Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics (TA = −40 to +85°C) Parameter Symbol Conditions MIN. TYP. MAX. Unit Data retention supply voltage VDDDR 1.47 Note 5.5 V Note The value depends on the POR detection voltage. When the voltage drops, the data is retained before a POR reset is effected, but data is not retained when a POR reset is effected. VDD STOP instruction execution Standby release signal (interrupt request) STOP mode Data retention mode VDDDR Operation mode 2.9 Flash Memory Programming Characteristics (TA = −40 to +85°C, 1.8 V ≤ EVDD = VDD ≤ 5.5 V, VSS = EVSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit CPU/peripheral hardware clock frequency fCLK 1.8 V ≤ VDD ≤ 5.5 V 1 24 MHz Number of code flash rewrites Retained for 20 years (Self/serial programming) Note 1,000 Retained for 1 years (Self/serial programming) Note 1,000,000 Number of data flash rewrites Cerwr 1 erase + 1 write after the erase is regarded as 1 rewrite. The retaining years are until next rewrite after the rewrite. Retained for 5 years (Self/serial programming) Note 100,000 Times Note When using flash memory programmer and Renesas Electronics self programming library Remark When updating data multiple times, use the flash memory as one for updating data. |
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