MPC5643L datasheet(18/136 Pages) FREESCALE

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MPC5643L Microcontroller Data Sheet, Rev. 8.1

Introduction

Freescale Semiconductor

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Channels not used for PWM generation can be used for buffered output compare functions

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Channels not used for PWM generation can be used for input capture functions

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Enhanced dual edge capture functionality

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Option to supply the source for each complementary PWM signal pair from any of the following:

— External digital pin

— Internal timer channel

— External ADC input, taking into account values set in ADC high- and low-limit registers

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DMA support

1.5.31

eTimer module

The MPC5643L provides three eTimer modules (on the LQFP package eTimer_2 is available internally only without any

external I/O access). Six 16-bit general purpose up/down timer/counters per module are implemented with the following

features:

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Maximum clock frequency of 120 MHz

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Individual channel capability

— Input capture trigger

— Output compare

— Double buffer (to capture rising edge and falling edge)

— Separate prescaler for each counter

— Selectable clock source

— 0–100% pulse measurement

— Rotation direction flag (Quad decoder mode)

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Maximum count rate

— Equals peripheral clock divided by 2 for external event counting

— Equals peripheral clock for internal clock counting

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Cascadeable counters

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Programmable count modulo

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Quadrature decode capabilities

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Counters can share available input pins

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Count once or repeatedly

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Preloadable counters

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Pins available as GPIO when timer functionality not in use

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DMA support

1.5.32

Sine Wave Generator (SWG)

A digital-to-analog converter is available to generate a sine wave based on 32 stored values for external devices (ex: resolver).

1.5.33

Analog-to-Digital Converter module (ADC)

The ADC module features include:

Analog part:

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2 on-chip ADCs

— 12-bit resolution SAR architecture

— Same digital interface as in the MPC5604P family

MPC5643L Datasheet(PDF) 18 Page - Freescale Semiconductor, Inc

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