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AM79C30AVC Datasheet(PDF) 52 Page - Advanced Micro Devices |
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AM79C30AVC Datasheet(HTML) 52 Page - Advanced Micro Devices |
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52 / 101 page ![]() 52 Am79C30A/32A Data Sheet SLAVE Mode — Bus Reversal Enabled DSC is the timing slave (FSC and SCLK are inputs) and control master (can communicate with other down- stream devices via MONI and C/I1). D and C/I0 arbitra- tion provided by TIC bus capability. DSC Downstream Downstream #1 #2 SBOUT SBIN DD DU DD DU B1, B2, D, MON0, C/I0, S/G(in), TIC(out) upstream downstream Figure 9. IOM-2 Slave Mode Operation with Bus Reversal DD DU IC1, IC2, MON1, C/I1 U- transceiver |
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