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HS-1120RH Datasheet(PDF) 2 Page - Intersil Corporation |
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HS-1120RH Datasheet(HTML) 2 Page - Intersil Corporation |
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2 / 11 page ![]() 2 Application Information Optimum Feedback Resistor The enclosed plots of inverting and non-inverting frequency response illustrate the performance of the HS-1120RH in various gains. Although the bandwidth dependency on closed loop gain isn’t as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier’s unique relationship between bandwidth and RF. All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF, in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier’s bandwidth is inversely proportional to RF. The HS-1120RH design is optimized for a 510 Ω RF at a gain of +1. Decreasing RF in a unity gain application decreases stability, resulting in excessive peaking and overshoot. At higher gains the amplifier is more stable, so RF can be decreased in a trade- off of stability for bandwidth. The table below lists recommended RF values for various gains, and the expected bandwidth. PC Board Layout The frequency response of this amplifier depends greatly on the amount of care taken in designing the PC board. The use of low inductance components such as chip resis- tors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10 µF) tantalum in parallel with a small value (0.1 µF) chip capacitor works well in most cases. Terminated microstrip signal lines are recommended at the input and output of the device. Capacitance directly on the output must be minimized, or isolated as discussed in the next section. Care must also be taken to minimize the capacitance to ground seen by the amplifier’s inverting input (-IN). The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. To this end, it is recommended that the ground plane be removed under traces connected to -IN, and connections to -IN should be kept as short as possible. An example of a good high frequency layout is the Evalua- tion Board shown in Figure 2. Driving Capacitive Loads Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier’s phase margin resulting in frequency response peaking and possible oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. Figure 1 details starting points for the selection of this resis- tor. The points on the curve indicate the RS and CL combina- tions for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. Picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. RS and CL form a low pass network at the output, thus limiting system bandwidth well below the amplifier band- width of 850MHz. By decreasing RS as CLincreases (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. Even so, bandwidth does decrease as you move to the right along the curve. For example, at AV = +1, RS = 50Ω, CL = 30pF, the overall bandwidth is limited to 300MHz, and bandwidth drops to 100MHz at AV = +1, RS = 5Ω, CL = 340pF. Evaluation Board The performance of the HS-1120RH may be evaluated using the HFA11XXEVAL Evaluation Board. The layout and schematic of the board are shown in Figure 2. To order evaluation boards, please contact your local sales office. Offset Adjustment The output offset voltage of the HS-1120RH may be nulled via connections to the BAL pins. Unlike a voltage feedback amplifier, offset adjustment is accomplished by varying the sign and/or magnitude of the inverting input bias current (-IBIAS). With voltage feedback amplifiers, bias currents are matched and bias current induced offset errors are nulled by matching the impedances seen at the positive and negative inputs. Bias GAIN (ACL)RF (Ω) BANDWIDTH (MHz) -1 430 580 +1 510 850 +2 360 670 +5 150 520 +10 180 240 +19 270 125 LOAD CAPACITANCE (pF) 50 45 40 35 30 25 20 15 10 5 0 0 40 80 120 160 200 240 280 320 360 400 AV = +1 AV = +2 FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs LOAD CAPACITANCE HS-1120RH |
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