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SPEAR320S-2 Datasheet(PDF) 59 Page - STMicroelectronics |
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SPEAR320S-2 Datasheet(HTML) 59 Page - STMicroelectronics |
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59 / 113 page  SPEAr320S Pin description Doc ID 022508 Rev 2 59/113 SSP2_CLK SSP clock. It is used as output in master mode as input in slave mode. IO PL_GPIO_15/B3 1, Extended PL_GPIO_92/G16 Extended mode PL_GPIO_63/C13 PL_GPIO_46/A11 PL_GPIO_34/E8 SSP2_MISO Master input slave output IO PL_GPIO_13/A1 1, Extended PL_GPIO_90/G14 Extended mode PL_GPIO_61/E12 PL_GPIO_44/A10 PL_GPIO_32/D7 SSP2_MOSI Master output slave input IO PL_GPIO_16/E6 1, Extended PL_GPIO_47/C10 Extended mode PL_GPIO_35/D8 PL_GPIO_16/E6 PL_GPIO_93/G17 PL_GPIO_64/D13 SSP2_SS0 SSP frame output (master mode), input (slave mode) IO PL_GPIO_14/A2 1, Extended PL_GPIO_91/G15 Extended mode PL_GPIO_62/A15 PL_GPIO_45/B10 PL_GPIO_33/E7 Table 27. SSP signals description (continued) Signal name Description Dir. PL_GPIO_# /Ball Configuration mode |
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