L9779WD datasheet(88/170 Pages) STMICROELECTRONICS

88 / 170 page

Functional description

L9779WD

88/170

DocID027452 Rev 5

Electrical characteristics of [OUT22], [OUT24], [OUT27], [OUT28] when

configured as single power stages connected in parallel

When the low side drivers are connected in parallel (in pair) to obtain a low side driver with a

lower resistance, OUT22 with OUT24 and OUT27 with OUT28, the following parameters

should be considered:

Table 36. Electrical characteristics of [OUT22], [OUT24], [OUT27], [OUT28] when configured as

single power stages connected in parallel (For information only)

Symbol

Parameter

Test condition

Min

Typ

Max

Unit

Out 22_24,

27_28

Imax

Output current

Not tested

1.2

RDS-on LSd

Drain source resistance Iload = 1.2 A

0.75

Ω

IOUTlk

Output leakage current

(1)

µA

VS/R

Voltage S/R on/off

TTurn-on

Turn-on delay time

µs

TTurn-off

Turn-off delay time

µs

IOVC

-2

4.2

TFILTEROVC

Over current filtering

time

Tested by scan

µs

TFILTERdiagoff

Filtering open load and

short to GND diag. off

Tested by scan

µs

Td_mask

Diagnosis mask delay

after switch-off

Tested by scan

350

400

450

µs

PWclampSP

Clamp single pulse

Iload = 1 A; single

pulse(1)

PWclampRP

Clamp repetitive pulses

Reliability note:

Iload = 0.6 A

Freq =10 Hz;

36 Mpulse (1000h)

IOUT_PD

Output diagnostic pull

down current off state

Vpin = 5 V (1)

110

µA

IOUT_PU

Output diagnostic pull

up current off state

(1)

-210

-108

µA

∆Vclamp

Delta clamping voltage

between low side to be

parallelized

-250

+250

1. Not to be tested, already covered by single low side measure and guaranteed by design.

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