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AT89C5131-RDTIL Datasheet(PDF) 10 Page - ATMEL Corporation |
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AT89C5131-RDTIL Datasheet(HTML) 10 Page - ATMEL Corporation |
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10 / 176 page ![]() 10 AT89C5131 4136B–USB–09/03 Table 11. System Signal Description Signal Name Type Description Alternate Function AD[7:0] I/O Multiplexed Address/Data LSB for external access Data LSB for Slave port access (used for 8-bit and 16-bit modes) P0[7:0] A[15:8] I/O Address Bus MSB for external access Data MSB for Slave port access (used for 16-bit mode only) P2[7:0] RD I/O Read Signal Read signal asserted during external data memory read operation. Control input for slave port read access cycles. P3.7 WR I/O Write Signal Write signal asserted during external data memory write operation. Control input for slave write access cycles. P3.6 RST I Reset Input Holding this pin low for 64 oscillator periods while the oscillator is running resets the device. The Port pins are driven to their reset conditions when a voltage lower than V IL is applied, whether or not the oscillator is running. This pin has an internal pull-up resistor which allows the device to be reset by connecting a capacitor between this pin and VSS. Asserting RST when the chip is in Idle mode or Power-down mode returns the chip to normal operation. This pin is set to 0 for at least 12 oscillator periods when an internal reset occurs. - ALE O Address Latch Enable Output The falling edge of ALE strobes the address into external latch. This signal is active only when reading or writing external memory using MOVX instructions. - PSEN O Program Test mode entry signal. This pin must be set to VDD for normal operation. - EA I External Access Enable This pin must be held low to force the device to fetch code from external program memory starting at address 0000h. It is latched during reset and cannot be dynamically changed during operation. - Table 12. Power Signal Description Signal Name Type Description Alternate Function AVSS GND Alternate Ground AVSS is used to supply the on-chip PLL and the USB PAD. - AVDD PWR Alternate Supply Voltage AVDD is used to supply the on-chip PLL and the USB PAD. - VSS GND Digital Ground VSS is used to supply the buffer ring and the digital core. - VDD PWR Digital Supply Voltage VDD is used to supply the buffer ring on all versions of the device. It is also used to power the on-chip voltage regulator of the Standard versions or the digital core of the Low Power versions. - |
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