AT89C5131-RDTIL datasheet(29/176 Pages) ATMEL

29 / 176 page

AT89C5131

4136B–USB–09/03

The other memory spaces (user, extra row, hardware security) are made accessible in

the code segment by programming bits FMOD0 and FMOD1 in FCON register in accor-

dance with Table 34. A MOVC instruction is then used for reading these spaces.

Table 34. FM0 Blocks Select Bits

Launching Programming

FPL3:0 bits in FCON register are used to secure the launch of programming. A specific

sequence must be written in these bits to unlock the write protection and to launch the

programming. This sequence is 5 followed by A. Table 35 summarizes the memory

spaces to program according to FMOD1:0 bits.

Table 35. Programming Spaces

The Flash memory enters a busy state as soon as programming is launched. In this

state, the memory is not available for fetching code. Thus to avoid any erratic execution

during programming, the CPU enters Idle mode. Exit is automatically performed at the

end of programming.

Note:

Interrupts that may occur during programming time must be disabled to avoid any spuri-

ous exit of the idle mode.

Status of the Flash Memory

The bit FBUSY in FCON register is used to indicate the status of programming.

FBUSY is set when programming is in progress.

Selecting FM0/FM1

The bit ENBOOT in AUXR1 register is used to choose between FM0 and FM1 mapped

up to F800h.

FMOD1

FMOD0

FM0 Adressable Space

User (0000h-FFFFh)

Extra Row(FF80h-FFFFh)

Hardware Security (0000h)

reserved

Write to FCON

Operation

FPL3:0

FPS

FMOD1

FMOD0

User

No action

Write the column latches in user

space

Extra Row

No action

Write the column latches in extra row

space

Security

Space

No action

Write the fuse bits space

Reserved

No action

AT89C5131-RDTIL Datasheet(PDF) 29 Page - ATMEL Corporation

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