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CS47024 Datasheet(PDF) 21 Page - Cirrus Logic |
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CS47024 Datasheet(HTML) 21 Page - Cirrus Logic |
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21 / 32 page ![]() 21 DS787PP9 5.15 Digital Switching Characteristics–S/PDIF RX Port 5.15 Digital Switching Characteristics–S/PDIF RX Port (Inputs: Logic 0 = VIL, Logic 1 = VIH, CL = 20 pF) 5.16 ADC Characteristics 5.16.1 Analog Input Characteristics (Commercial) Test Conditions (unless otherwise specified): TA = 0–+70°C; VDD = 1.8V±5%, VDDA (VA) = 3.3V±5%, 1kHz sine wave driven through the passive input filter (Ri = 10 k) in Fig. 5-13 or Fig. 5-14; DSP running test application; Measurement Bandwidth is 10–20kHz. 1. dB units referred to the typical full-scale voltage. 2. These full-scale values were measured with Ri=10k for both the single-ended and differential mode input circuits. 3. The full-scale voltage can be changed by scaling Ri. Differential Full-Scale (Vpp) = 3.7*VDDA*(Ri+200)/(10k+200) Single-Ended Full-Scale (Vpp) = 1.85*VDDA*(Ri+200)/(10k+200) 4. Measured between AIN_xx+ and AN_xx–. 5. Measured between AIN_xx+ and AGND. 6. Decreasing full-scale voltage by reducing Ri causes the noise floor to increase. 7. Common mode input current should be kept to less than ±160uA to avoid performance degradation: |(Iip+Iin)/2| < 160uA. This corresponds to ±1.6V for Ri=10 k in the differential case. 8. This number was measured using perfectly matched external resistors (Ri). Mismatch in the external resistors typically reduces CMRR by 20 log (| R i|/Ri + 0.001). 9. CL represents the parasitic load capacitance between Ri on the input circuit and the input pin of the CS47048 package. 10. This measurement is not applicable to the CS47028 and CS47024 devices. Parameter Symbol Min Typ Max Units PLL Clock Recovery Sample Rate Range — 30 — 200 kHz Differential Single-ended Parameter Min Typ Max Min Typ Max Unit Fs = 96 kHz Dynamic Range1,6,7 A-weighted Unweighted 40 kHz bandwidth unweighted 99 96 — 105 102 99 — — — 96 93 — 102 99 96 — — — dB dB dB Total Harmonic Distortion + Noise6,7 –1 dB –20 dB –60 dB 40 kHz bandwidth –1 dB — — — — –98 –82 –42 –90 –92 — — — — — — — –95 –79 –39 –90 –89 — — — dB dB dB dB AIN_1A/B Interchannel Isolation10 —95 — — 95 — dB AID_[2.6]A/B MUX Interchannel Isolation — 95 — — 95 — dB DC Accuracy Interchannel Gain Mismatch — 0.1 — — 0.1 — dB Gain Drift — ±120 —— ±120 — ppm/°C Analog Input Full-scale Input Voltage2,3 3.3 3.7 •VA 3.9 1.65 1.85•VA 1.95 VPP Differential Input Impedance4 — 400 — — — — Single-ended Input Impedance5 — — — — 200 — Common Mode Rejection Ratio (CMRR)8 —60 — — — — dB Parasitic Load Capacitance (CL)9 — — 20 — — 20 pF |
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