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MCP3913 Datasheet(PDF) 64 Page - Microchip Technology |
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MCP3913 Datasheet(HTML) 64 Page - Microchip Technology |
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64 / 82 page ![]() MCP3913 DS20005227A-page 64 2013 Microchip Technology Inc. 8.6 STATUSCOM Register – Status and Communication Register Name Bits Address Cof. STATUSCOM 24 0x0C R/W REGISTER 8-6: STATUSCOM REGISTER R/W-1 R/W-0 R/W-1 R/W-0 R/W-1 R/W-0 R/W-0 R/W-1 READ<1> READ<0> WRITE DR_HIZ DR_LINK WIDTH_ CRC WIDTH_ DATA<1> WIDTH_ DATA<0> bit 23 bit 16 R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 U-0 EN_CRCCOM EN_INT Reserved Reserved — — — — bit 15 bit 8 U-0 U-0 R-1 R-1 R-1 R-1 R-1 R-1 — — DRSTATUS<5> DRSTATUS<4> DRSTATUS<3> DRSTATUS<2> DRSTATUS<1> DRSTATUS<0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 23-22 READ<1:0>: Address counter increment setting for Read Communication 11 = Address counter auto-increments, loops on the entire register map 10 = Address counter auto-increments, loops on register TYPES (DEFAULT) 01 = Address counter auto-increments, loops on register GROUPS 00 = Address not incremented, continually reads the same single-register address bit 21 WRITE: Address counter increment setting for Write Communication 1 = Address counter auto-increments and loops on writable part of the register map (DEFAULT) 0 = Address not incremented, continually writes to the same single register address bit 20 DR_HIZ: Data Ready Pin Inactive State Control 1 = The DR pin state is a logic high when data is NOT ready 0 = The DR pin state is high-impedance when data is NOT ready (DEFAULT) bit 19 DR_LINK Data Ready Link Control 1 = Data Ready link enabled. Only one pulse is generated on the DR pin for all ADC channels, corresponding to the data ready pulse of the most lagging ADC. 0 = Data Ready link disabled. Each ADC produces its own data ready pulse on the DR pin. bit 18 WIDTH_CRC Format for CRC-16 on communications 1 = 32-bit (CRC-16 code is followed by sixteen zeros). This coding is compatible with CRC implementation in most 32-bit MCUs (including PIC32 MCUs). 0 = 16 bit (default) bit 17-16 WIDTH_DATA<1:0>: ADC Data Format Settings for all ADCs (see Section 5.5 “ADC Output Coding”) 11 = 32-bit with sign extension 10 = 32-bit with zeros padding 01 = 24-bit (default) 00 = 16-bit (with rounding) bit 15 EN_CRCCOM: Enable CRC CRC-16 Checksum on Serial communications 1 = CRC-16 Checksum is provided at the end of each communication sequence (therefore each communication is longer). The CRC-16 Message is the complete communication sequence (see section Section 6.9 “Securing Read Communications Through CRC-16 Checksum” for more details). 0 = Disabled (Default) |
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