ML7005 datasheet(4/26 Pages) LAPIS

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FEDL7005-01

ML7005

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PIN DESCRIPTION

Symbol

Type

Description

DTRIO

OUT

Output pin for DTMF signal receiver input amplifier.

See the figure 8 for adjusting the receive signal level. See the figure 10 when

the DTMF signal receiver is not used.

DTRIM

Inverting input pin for DTMF signal receiver input amplifier.

DTRIP

Non-inverting input pin for DTMF signal receiver input amplifier.

OUT

Output pin for signal ground.

The output voltage is half of VDD.

Connect SG and GND by a 1 μF capacitor.

This pin goes to a high impedance state when in power down mode.

CPAO

OUT

Output pin for amplifier used for adjusting the transmit output level of CPT

(Call Progress Tone) signal generator.

The non-inverting input of this amplifier is internally connected to SG.

See the figure 11 for adjusting the transmit signal level.

When this amplifier is not used, the CPAO pin should be shorted to the

CPAI pin.

CPAI

Inverting input pin for amplifier used to adjust the transmit level of the CPT

signal generator.

CPTGO

OUT

Analog output pin for CPT signal generator.

The tone amplitude is approximately -3 dBm.

The transmit signal level can be changed by using the CPAO and CPAI pins.

See the figure 11 for adjusting the transmit signal level.

Control the ON/OFF of CPT transmission by using CPGC of the control

PTYPE

Input pin for selecting the processor mode.

This selection determines the functions of READB, CSB, ALE, WRB, D1

and D0 pins.

When this pin is "1", the Intel processor mode is selected.

When this pin is "0", the Motorola processor mode (MSM7524-compatible)

is selected.

This pin should be fixed at "0" or "1".

VDD

—

Power supply pin.

Input pin for controlling the power down mode.

When this pin is set to "1", the entire LSI enters the power down mode and

each functional operation stops.

The DC level of the analog output pin becomes undefined.

The digital output pins (FXD0, CPD0) and status register indicate a

non-detection state.

At that time, the control register CR and DTMF transmit register DTMFT

are cleared. ("0" is written)

The internal circuits (timer, etc. for each detector) also are reset.

After turning on the power, set this pin to "1" to reset the LSI before using

this LSI.

When this pin is set to "0", the normal operation starts.

OUT

X1 and X2 are connected to a 3.579545 MHz crystal.

See "Oscillation Circuit" of the FUNCTIONAL DESCRIPTION for

reference.

CLKO

OUT

3.579545 MHz clock output pin.

This pin can drive one ML7005 device.

ML7005 Datasheet(PDF) 4 Page - LAPIS Semiconductor Co., Ltd.

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