| Electronic Components Datasheet Search |
|
SST25WF080B Datasheet(PDF) 22 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
SST25WF080B Datasheet(HTML) 22 Page - Microchip Technology |
|
22 / 39 page ![]() SST25WF080B DS20005164C-page 22 2014 Microchip Technology Inc. 6.2 Hardware Data Protection SST25WF080B provides a power-up reset function. To ensure that the power reset circuit will operate cor- rectly, the device must meet the conditions shown in Figure 6-2 and Table 6-4. Microchip does not guaran- tee the data in the event of an instantaneous power fail- ure that occurs during a Write operation. FIGURE 6-2: POWER-DOWN TIMING DIAGRAM 6.3 Software Data Protection SST25WF080B prevents unintentional operations by not recognizing commands under the following condi- tions: • After inputting a Write command, if the rising CE# edge timing is not in a bus cycle (8 CLK units of SCK) • When the Page-Program data is not in 1-byte increments • If the Write Status Register instruction is input for two bus cycles or more. 6.4 Decoupling Capacitor A 0.1μF ceramic capacitor must be provided to each device and connected between VDD and VSS to ensure that the device will operate correctly. TABLE 6-4: RECOMMENDED SYSTEM POWER-DOWN TIMINGS Symbol Parameter Min Max Units TPD Power-down time 10 ms VBOT Power-down voltage 0.2 V TPD VDD Min VDD Max VDD 25164 F48.0 0V VBOT |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |