IOBUS0 datasheet(16/88 Pages) FTDI

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C opyright © Future T ec hnology Devic es I nternational Limited

Datasheet

Vinculum-II Embedded Dual USB Host Controller IC

V ers ion 1 .7

Doc ument N o.: FT _000138 C learance N o.: FT DI# 1 43

3.10 Pin Configuration USB and Power

Pin No

Name

Type

Description

64 pin

48 pin

32 pin

USB1DP

I/O

USB host/slave port 1 - USB Data Signal Plus with

integrated pull-up/pull-down resistor.

USB1DM

I/O

USB host/slave port 1 - USB Data Signal Minus with

integrated pull-up/pull-down resistor.

USB2DP

I/O

USB host/slave port 2 - USB Data Signal Plus with

integrated pull-up/pull-down resistor.

USB2DM

I/O

USB host/slave port 2 - USB Data Signal Minus with

integrated pull-up/pull-down resistor.

Table 3.1 USB Interface Group

Pin No

Name

Type

Description

64 pin

48 pin

32 pin

1, 30,

35, 53

1, 24,

27, 39

1, 16,

19, 27

GND

PWR

Device ground supply pins.

3.3V

VREGIN

PWR

+3.3V supply to the regulator.

1.8V

VCC PLL

PWR

+1.8V supply to the internal clock multiplier. This pin

requires a 100nF decoupling capacitor.

* 48 pin LQFP package only – This power input is internally

connected to VREG_OUT.

All other packages need this pin connected to a 1.8V power

source. Most common applications will connect this to

VREG_OUT.

GND PLL

PWR

Device analogue ground supply for internal clock multiplier.

VREG

OUT

Output

1.8V output from regulator to device core

* N/C on 48 pin LQFP package only.

All other packages will typically need to connect pins 7 and

21, 38,

17, 30,

13, 22,

VCCIO

PWR

+3.3V supply to the input / output. Interface pins

(IOBUS). Leaving the VCCIO unconnected will lead to

unpredictable operation on the interface pins.

Table 3.2 Power and Ground

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