Electronic Components Datasheet Search
  British  ▼
ALLDATASHEET.CO.UK

X  

IOBUS0 Datasheet(PDF) 47 Page - Future Technology Devices International Ltd.

Part # IOBUS0
Description  Vinculum-II Embedded Dual USB Host Controller IC
PDF  88 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  FTDI [Future Technology Devices International Ltd.]
Direct Link  http://www.ftdichip.com
Logo FTDI - Future Technology Devices International Ltd.

IOBUS0 Datasheet(HTML) 47 Page - Future Technology Devices International Ltd.

Back Button IOBUS0 Datasheet HTML 43Page - Future Technology Devices International Ltd. IOBUS0 Datasheet HTML 44Page - Future Technology Devices International Ltd. IOBUS0 Datasheet HTML 45Page - Future Technology Devices International Ltd. IOBUS0 Datasheet HTML 46Page - Future Technology Devices International Ltd. IOBUS0 Datasheet HTML 47Page - Future Technology Devices International Ltd. IOBUS0 Datasheet HTML 48Page - Future Technology Devices International Ltd. IOBUS0 Datasheet HTML 49Page - Future Technology Devices International Ltd. IOBUS0 Datasheet HTML 50Page - Future Technology Devices International Ltd. IOBUS0 Datasheet HTML 51Page - Future Technology Devices International Ltd. Next Button
Zoom Inzoom in Zoom Outzoom out
 47 / 88 page
background image
47
C opyright © Future T ec hnology Devic es I nternational Limited
Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
V ers ion 1 .7
Doc ument N o.: FT _000138 C learance N o.: FT DI# 1 43
6.3.5 Unmanaged Mode
The VNC2 SPI Slave also supports an unmanaged SPI mode. This is a simple data exchange between
Master and Slave. It operates in the standard 4 pin mode (SS#, CLK, MOSI and MISO) with all transfers
controlled by the SPI Master.
When the CPU wants to send data out of the SPI Slave it writes this into the spi_slave_data_tx register.
This will then be moved into the transfer shift register to wait for the SPI Master to request it. The SPI
Master will at some point assert SS# and start clocking data on MOSI with SCK. As this is shifted into the
transfer shift register, the SPI Slave will also be shifting data in the opposite direction on MISO. At the
end of the transfer the SPI Slave copies the received data from the shift register to spi_slave_data_rx as
seen in Figure 6.12.
SPI
Clk Div
0
1
2
3
4
5
6
7
Rx Shift Register
SPI Master
SPI Slave
ss#
clk
mosi
miso
0
1
2
3
4
5
6
7
Shift Register
0
1
2
3
4
5
6
7
Shift Register
0
1
2
3
4
5
6
7
Tx Shift Register
Figure 6.12 Unmanaged Mode Transfer Diagram



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com