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LTC4230IGN Datasheet(PDF) 19 Page - Linear Technology |
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LTC4230IGN Datasheet(HTML) 19 Page - Linear Technology |
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19 / 36 page  19 LTC4230 4230f 1 3 6 5 7 4 20 µA PULL-UP 20 µA PULL-UP LOAD CURRENT > 150mV/RSENSEn 4230 F08 CHECK FOR FILTER LOW (< VREF) CHECK FOR FAULT HIGH (> VREF + 50mV) 2 CHECK FOR GATE n < 0.25V FAST COMPARATOR ARMED SLOW COMPARATOR ARMED CIRCUIT BREAKER TRIPS, ALL GATE n PINS PULL LOW IMMEDIATELY ON TIMER FAULT GATE n GATE n VOUTn VOUTn IOUTn FILTER 1.6 µA PULL-DOWN 8 9 CHECK FOR TIMER < 0.3V LOAD CURRENT < 50mV/RSENSEn Figure 8. Output Short Circuit Causes Fast Comparator to Trip the Circuit Breaker APPLICATIO S I FOR ATIO RESETTING THE ELECTRONIC CIRCUIT BREAKER Once the LTC4230’s circuit breaker is tripped, FAULT is asserted low and the GATE n pin is pulled to ground. The LTC4230 remains latched OFF in this fault state until the external fault is cleared. To clear the internal fault detect circuitry and to restart the LTC4230, its ON pin must be driven low (VON < 1.234V) for at least 30µs, after which time FAULT goes high. Toggling the ON pin from low to high (VON > 1.314V) initiates a restart sequence in the LTC4230. The timing diagram in Figure 10 illustrates a |
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