LTC4230IGN datasheet(22/36 Pages) LINER

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LTC4230

4230f

start-up sequence where the LTC4230 is powered up into

a load overcurrent condition. Note that the circuit breaker

trips at Time Point 8 and is reset at Time Point 10.

ADJUSTING SLOW COMP

n’S RESPONSE TIME

The response time of SLOW COMP

n is adjusted using a

capacitor connected from the LTC4230’s FILTER pin to

ground. If this pin is left unused, SLOW COMP

n’s delay

defaults to 10

µs. During normal operation, the FILTER

output pin is held low as an internal 10

µA pull-down

current source is connected to this pin by transistor M4.

This pull-down current source is turned off when an

overcurrent load condition is detected by SLOW COMP

During an overcurrent condition, the internal 2

µA pull-up

current source is connected to the FILTER pin by transis-

tor M5, thereby charging CFILTER. As the charge on the

capacitor accumulates, the voltage across CFILTER

increases. Once the FILTER pin voltage increases to 1.26V,

the electronic circuit breaker trips and the LTC4230’s

GATE

n pins are switched quickly to ground by transistor

n (refer to the Block Diagram). After the circuit breaker

is tripped, M5 is turned off, M4 is turned on and the 10

µA

pull-down current then holds the FILTER pin voltage low.

SLOW COMP

n’s response time from an overcurrent fault

condition to when the circuit breaker trips (GATE

n OFF) is

given by Equation 7:

SLOWCOMP

FILTER

n =

+µ

126

.•

(7)

For example, if CFILTER=1000pF,SLOWCOMPn’sresponse

time = 640

µs. As a design aid, SLOW COMPn’s delay time

(tSLOW COMP) versus CFILTER for standard values of CFILTER

from 100pF to 1000pF is illustrated in Table 2.

Table 2. tSLOWCOMPn vs CFILTER

CFILTER

tSLOWCOMPn

100pF

µs

220pF

149

µs

330pF

218

µs

470pF

306

µs

680pF

438

µs

820pF

527

µs

1000pF

640

µs

SENSE RESISTOR CONSIDERATIONS

The fault current level at which the LTC4230’s internal

electronic circuit breakers trip is determined by a sense

resistor connected between the LTC4230’s VCCn and

SENSE

n pins and two separate trip points. The first trip

point is set by the SLOW COMP

n’s threshold, VCB(SLOW) =

50mV, and the trip occurs if a load current fault condition

exist for more than 10

µs. The current level at which the

electronic circuit breaker trips is given by Equation 8:

TRIP SLOW

CB SLOW

SENSE

()

(8)

The second trip point is set by the FAST COMP

n’s thresh-

old, VCB(FAST) = 150mV, and occurs during fast load

current transients that exist for 500ns or longer. The

current level at which the circuit breaker trips in this case

is given by Equation 9:

TRIP FAST

CB FAST

SENSE

()

150

(9)

As a design aid, the currents at which electronic circuit

breaker trips for common values for RSENSE are shown in

Table 3.

Table 3. ITRIP(SLOW) and ITRIP(FAST) vs RSENSE

RSENSE

ITRIP(SLOW)

ITRIP(FAST)

0.005

Ω

10A

30A

0.006

Ω

8.3A

25A

0.007

Ω

7.1A

21A

0.008

Ω

6.3A

19A

0.009

Ω

5.6A

17A

0.01

Ω

15A

For proper circuit breaker operation, Kelvin-sense PCB

connections between the sense resistor and the LTC4230’s

VCCn and SENSEn pins are strongly recommended. The

drawing in Figure 11 illustrates the correct way of making

connections between the LTC4230 and the sense resistor.

PCB layout should be balanced and symmetrical to mini-

mize wiring errors. In addition, the PCB layout for the

sense resistor should include good thermal management

techniques for optimal sense resistor power dissipation.

APPLICATIO S I FOR ATIO

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