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LTC4230IGN Datasheet(PDF) 26 Page - Linear Technology |
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LTC4230IGN Datasheet(HTML) 26 Page - Linear Technology |
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26 / 36 page  26 LTC4230 4230f In the previous three examples, the connection sense was hard wired with no processor (low) interrupt capability. As illustrated in Figure 15, the addition of an inexpensive logic-level discrete MOSFET and a couple of resistors offers processor interrupt control to the connection sense. R4 keeps the gate of M2 at VCC until the card is firmly mated to the backplane. A logic low for the ON/OFF signal turns M2 off, allows the ON pin to pull high and turns on the LTC4230. A more elaborate connection sense scheme is shown in Figure 16. The bases of Q1 and Q2 are wired to short pins located on opposite ends of the edge connector because the installation/removal of printed circuit cards generally requires rocking the card back and forth. When VCC makes connection, the bases of transistors Q1 and Q2 are pulled high, biasing them on. When both are on, the LTC4230’s ON pin is held low, keeping the LTC4230 off. When the short base connector pins of Q1 and Q2 finally mate to the backplane, their bases are grounded, biasing the transistors off. The ON pin is then pulled high by R3 enabling the LTC4230 and a power-up cycle begins. A software-initiated power-down cycle can be started by momentarily driving transistor M1 with a logic high signal. This in turn will drive the LTC4230’s ON pin low. If the ON pin is held low for more than 8 µs, the LTC4230’s GATEn pin is switched to ground. APPLICATIO S I FOR ATIO + 4 3 2 1 VCCn SENSE n LTC4230* 15 12 14 CLOAD VOUT 5V 5A 4230 F15 R6 15k GATE n GND TIMER PCB CONNECTION SENSE CTIMER 1 µF FB n ON SHORT LONG VCC 5V GND ON/OFF LONG Z1: SMAJ10 M2: 2N7002LT1 *ADDITIONAL DETAILS OMITTED FOR CLARITY RESET n R2 10k R4 10k M2 R1 10k RX 10 Ω RSENSE 0.007 Ω PCB EDGE CONNECTOR (MALE) M1 Si4410DY Z1 R5 36k R7 10k µP LOGIC RESET SHORT CX 100nF BACKPLANE CONNECTOR (FEMALE) Figure 15. Connection Sense with ON/OFF Control + 4 3 2 1 VCCn SENSE n LTC4230* 15 12 14 CLOAD VOUT 5V 5A 4230 F16 R5 15k GATE n GND TIMER PCB CONNECTION SENSE CTIMER 1 µF FB n ON LONG VCC GND ON/RESET LONG Z1: SMAJ10 M1: 2N7002LT1 Q1, Q2: MMBT3904LT1 *ADDITIONAL DETAILS OMITTED FOR CLARITY RESET n M1 RX 10 Ω RSENSE 0.007 Ω PCB EDGE CONNECTOR (MALE) M2 Si4410DY Z1 R3 10k R2 10k R1 10k R8 10k R4 36k R7 10k µP LOGIC RESET SHORT SHORT LAST BLADE OR PIN ON CONNECTOR SHORT CX 0.1 µF BACKPLANE CONNECTOR (FEMALE) Q1 Q2 LAST BLADE OR PIN ON CONNECTOR Figure 16. Connection Sense for Rocking the Daughter Board Back and Forth |
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