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M69KB096AA Datasheet(PDF) 37 Page - STMicroelectronics |
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M69KB096AA Datasheet(HTML) 37 Page - STMicroelectronics |
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37 / 48 page ![]() 37/48 M69KB096AA Figure 27. Configuration Register Write in Asynchronous Mode Followed by Read Operation Note: 1. Non default BCR Register settings: Latency code two (three clocks); WAIT active Low; Hold data one clock; WAIT asserted during delay. 2. A19 = VIL to load RCR; A19 = VIH to load BCR. A0-A21 except A19 K OPCODE ADDRESS ADDRESS A19 Initiate Control Register Access CR tAVLH tLLVH tLHLL tEHEL tELWH Select Control Register L E G W AI06778 DATA VALID DQ0-DQ15 LB/UB tAVLH Write Address Bus Value to Control Register tWLWH |
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