ST25R3911B datasheet(64/116 Pages) STMICROELECTRONICS

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1.3.10

Auxiliary definition register

Address: 09h

Type: RW

Table 35. Auxiliary definition register

Bit

Name

Default

Function

Comments(1)

no_crc_rx 0

1: Receive without CRC

Valid for all protocols, for ISO14443A REQA, WUPA and anticollision

receive without CRC is done automatically (2)

crc_2_fifo 0

1: Make CRC check, but put CRC bytes in

FIFO and add them to number of receive

bytes

Needed for EMV compliance

tr_am

0: OOK

1: AM

Set automatically by command Analog Preset, can be modified by

en_fd

1: Enable External Field Detector

External Field Detector with Peer Detection threshold is activated.

Preset for NFCIP-1 active communication mode

ook_hr

1: Put RFO driver in tristate during OOK

modulation

Valid for all protocols using OOK modulation (also in transparent

mode)

rx_tol

1: BPSK fc/32: more tolerant BPSK decoder

for bit rate fc/32, ISO14443A fc/128, NFCIP-1

fc/128: more tolerant processing of first byte

nfc_n1

Value of n for direct commands NFC Initial Field ON and NFC

Response Field ON (0 ... 3)

nfc_n0

1. Default setting takes place at power-up and after set default command.

2. Receive without CRC is done automatically when REQA and WUPA commands are sent using direct

commands Transmit REQA and Transmit WUPA, respectively, and in case anticollision is performed setting

bit antcl.

1.3.11

Receiver configuration register 1

Address: 0Ah

Type: RW

Table 36. Receiver configuration register 1

Bit

Name

Default

Function

Comments(1)

ch_sel

0: Enable AM channel

1: Enable PM channel

In case only one Rx channel is enabled in the Operation Control register

it defines which channel is enabled.

In case both channels are enabled and manual channel selection is

active, it defines which channel is used for receive framing.

amd_sel 0

0: Peak detector

1: Mixer

AM demodulator type select,

VHBR automatic preset to mixer

lp2

Low pass control (see Table 2. Low pass

control)

For automatic and other recommended filter settings, refer to

Table 3. Receiver filter selection and gain range.

lp1

lp0

h200

First and third stage zero setting

(see Table 1. First and third stage zero

setting)

h80

z12k

1. Default setting takes place at power-up and after set default command.

ST25R3911B

Registers

DS11793 - Rev 6

page 64/116

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