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ST25R3918 Datasheet(PDF) 44 Page - STMicroelectronics |
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ST25R3918 Datasheet(HTML) 44 Page - STMicroelectronics |
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44 / 141 page ![]() Application information ST25R3918 44/141 DS13490 Rev 2 MISO pin is updated on the rising edge of the SCLK signal. Data is transferred byte-wise, most significant bit first. Read and Write commands support an address auto increment to reduce communication time. Table 8 provides an overview of the SPI signals. The MISO output is in tristate as long as no output data is available. Due to this the MOSI and the MISO can be externally shorted to create a three-wire SPI. During the time the MISO output is in tristate, it is also possible to switch on a 10 kΩ pull down by activating option bits miso_pd1 and miso_pd2 in the IO configuration register 2. Figure 9. Exchange of signals with a microcontroller The first two bits of the first byte transmitted after the BSS high to low transition define the SPI operation mode. All Read and Write modes support address auto incrementing, which means that if, after the address and first data byte some additional data bytes are sent (or read), they are written to (or read from) addresses incremented by 1. Table 9 shows available SPI operation modes. Register read and write operations are possible in all ST25R3918 operation modes. FIFO and PT_memory operations are possible in case en (bit 7 of the Operation control register) is set and the crystal oscillator is stable. Some direct commands are accepted in all operation modes, others require en (bit 7 of the Operation control register) to be set and the crystal oscillator to be stable (see Table 11). Table 8. Serial data interface (4-wire interface) signal lines Name Signal Signal level Description I2C_EN Digital input CMOS Pull to GND for SPI operation BSS Digital input with pull-up Active low - Slave select MOSI Digital input Master out - Slave in (MCU → ST25R3918) MISO Digital output with tristate Master in - Slave out (ST25R3918 → MCU) SCLK Digital input Serial clock IRQ Digital output Active high - Interrupt output pin MS54050V1 MOSI MISO I/O MOSI MISO MISO MOSI Separate SPI input and output signals to MCU Bidirectional data IO signal to MCU |
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