ST25R3918 datasheet(35/141 Pages) STMICROELECTRONICS

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DS13490 Rev 2

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ST25R3918

Application information

140

detect the moment when the peer NFC device (either an initiator or a target) has stopped

emitting an RF field.

The External Field Detector is enabled in low power Peer Detection mode by setting bits

en_fd_c,1:0> in the Operation control register.

Collision avoidance threshold

This threshold is used during the RF collision avoidance sequence, which is executed by

sending NFC Field ON commands (see Section 4.4.5: NFC field ON commands). It can be

selected in the range from 25 to 800 mVPP.

4.2.9

Power supply system

The ST25R3918 features three positive supply pins, VDD, VDD_TX and VDD_IO:



VDD is the main power supply pin. It supplies the ST25R3918 blocks through two

regulators (VDD_A, VDD_D)



VDD_TX is the transmitter supply pin. It supplies the transmitter via two regulators

(VDD_RF, VDD_AM). VDD range from 2.4 to 5.5 V is supported. VDD and VDD_TX must

be connected to the same power supply.



VDD_IO is used to define supply level for digital communication pins (BSS, MISO,

MOSI, SCLK, IRQ, MCU_CLK). Digital communication pins interface to the

ST25R3918 logic through level shifters, therefore the internal supply voltage can be

either higher or lower than VDD_IO. VDD_IO range from 1.65 to 5.5 V is supported.

Figure 8 details the building blocks of the ST25R3918 power supply system. It contains

three regulators, a power-down support block, a block generating analogue reference

voltage (AGDC) and a block performing automatic power supply adjustment procedure. The

three regulators are providing supply to analogue blocks (VDD_A), logic (VDD_D) and

transmitter (VDD_RF). The use of VDD_A and VDD_D regulators is mandatory at 5 V power

supply to provide regulated voltage to analogue and logic blocks, which only use 3.3 V. The

use of VDD_A and VDD_D regulators at 3 V supply and VDD_RF regulator at any supply

voltage is recommended to improve system PSRR.

Regulated voltage can be adjusted automatically to have maximum possible regulated

voltage while still having good PSRR. All regulator pins also have corresponding negative

supply pins externally connected to ground potential (VSS). Figure 1 and Figure 2 show

typical application schematics with all regulators used. For regulators recommended

blocking capacitors are 2.2 μF in parallel with 10 nF, for pin AGDC 1 μF in parallel with 10 nF

is suggested.

ST25R3918 Datasheet(PDF) 35 Page - STMicroelectronics

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