BLP05H6250XR_H6250XRG

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© Ampleon Netherlands B.V. 2016. All rights reserved.

Product data sheet

Rev. 4 — 21 September 2016

10 of 15

BLP05H6250XR; BLP05H6250XRG

Power LDMOS transistor

8. Package outline

Fig 11. Package outline SOT1223-2 (HSOP4F)

References

Outline

version

European

projection

Issue date

IEC

JEDEC

JEITA

SOT1223-2

sot1223-2_po

15-01-12

15-06-04

Unit

mm

max

nom

min

3.9

0.2

3.90

0.27 20.62 19.00

9.96

8.13

8.85

A

Dimensions (mm are the original dimensions)

HSOP4F: plastic, heatsink small outline package; 4 leads(flat)

SOT1223-2

3.65

bc

16.00

5.84

8.45

10.01 8.18

16.05

5.89

0.1

3.85

0.22 20.57 18.95

4.07

0.4

3.60

9.55

2.97

F

9.91

8.08

15.95

20.39

20.44

20.34

5.79

9.78

9.83

9.73

0

3.80

0.17 20.52 18.90

3.55

1.62

v

0.25

0.1

1.57

0.25

wy

1.52

15.96

16.16

15.76

0

10 mm

scale

detail X

D

E

c

A

12

43

y

B

A

vA

X

wB

b

pin 1 index

F (4x)

Note

1. Package body dimensions “D and “E do not include mold and metal protrusions. Allowable protrusion is 0.25 mm per side.

2. Lead width dimension “b does not include dambar protrusions. Allowable dambar protrusion is 0.25 mm in total per lead.

(8x) METAL

PROTRUSIONS (SOURCE)

(2x)

(2x)

e

(2x)

(2x)