Datasheet

22

Rev. 1.20

2022-04-27

TLE7258

LIN transceiver

Electrical characteristics

Duty cycle D2

for VS supply 6.1 V to 7.6 V

(for worst case at 20 kBit/s)

D2

–

–

0.581 –

Duty cycle 2 5)

THRec(min)= 0.410 × VS;

THDom(min)= 0.275 × VS;

6.1 V < VS <7.6 V;

tbit = 50 µs;

D2 = tbus_rec(max) / 2 × tbit

4.9.10

Duty cycle D3

(for worst case at 10.4 kBit/s)

D3

0.417 –

–

–

Duty cycle 3 5)

THRec(max) = 0.778 × VS;

THDom(max) =0.616 × VS;

VS = 7.0 … 18 V; tbit = 96 µs;

D3 = tbus_rec(min) / 2 × tbit;

LIN Spec 2.2A (Par. 29)

4.9.11

Duty cycle D3

for VS supply 5.5 V to 7.0 V

(for worst case at 10.4 kBit/s)

D3

0.417 –

–

–

Duty cycle 3 5)

THRec(max) = 0.797 × VS;

THDom(max) = 0.630 ×VS;

5.5 V < VS <7.0 V;

tbit = 96 µs;

D3 = tbus_rec(min) / 2 × tbit;

4.9.12

Duty cycle D4

(for worst case at 10.4 kBit/s)

D4

–

–

0.590 –

Duty cycle 4 5)

THRec(min) = 0.389 × VS;

THDom(min) = 0.251 × VS;

VS = 7.6 … 18 V; tbit = 96 µs;

D4 = tbus_rec(max) / 2 × tbit;

LIN Spec 2.2A (Par. 30)

4.9.13

Duty cycle D4

for VS supply 6.1 V to 7.6 V

(for worst case at 10.4 kBit/s)

D4

–

–

0.590 –

Duty cycle 4 5)

THRec(min) = 0.378 × VS;

THDom(min)= 0.242 × VS;

6.1 V < VS <7.6 V;

tbit = 96 µs;

D4 = tbus_rec(max) / 2 × tbit;

4.9.14

1) Not subject to production test, specified by design

2) VBUS_CNT =(Vth_dom +Vthrec)/2

3) VHYS =Vth_rec -Vth_dom

4) Delay time specified for a load of 10 kΩ / 20 pF on the INH output

5) Bus load concerning LIN Spec 2.2A:

Load 1 = 1 nF / 1 kΩ = CBUS / RL

Load 2 = 6.8 nF / 660 Ω = CBUS / RL

Load 3 = 10 nF / 500 Ω = CBUS / RL

Table 6

Electrical characteristics (cont’d)

5.5 V < VS <18V; RL = 500 Ω; -40°C < Tj < 150°C;

all voltages with respect to ground; positive current flowing into pin; unless otherwise specified.

Parameter

Symbol

Values

Unit Note or Test Condition

Num

ber

Min. Typ. Max.