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HC708KL8GRS/D Datasheet(PDF) 39 Page - NXP Semiconductors |
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HC708KL8GRS/D Datasheet(HTML) 39 Page - NXP Semiconductors |
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39 / 246 page ![]() Memory Map MC68HC708KL8 — Rev. 2.1 General Release Specification Freescale Semiconductor Memory Map 39 $0038 USB Address Register (UADDR) Read: USBEN UADD6 UADD5 UADD4 UADD3 UADD2 UADD1 UADD0 Write: Reset: 0 0 0 0 0 0 0 0 $0039 USB Interrupt Register 0 (UIR0) Read: TXD0F RXD0F RSTF SUSPND TXD0IE RXD0IE 00 Write: TXD0FR RXD0FR Reset: 0 0 0 0 0 0 0 0 $003A USB Interrupt Register 1 (UIR1) Read: TXD1F EOPF RESUMF 0 TXD1IE EOPIE 00 Write: RESUMFR TXD1FR EOPFR Reset: 0 0 0 0 0 0 — — $003B USB Control Register 0 (UCR0) Read: T0SEQ STALL0 TX0E RX0E TP0SIZ3 TP0SIZ2 TP0SIZ1 TP0SIZ0 Write: Reset: 0 0 0 0 0 0 0 0 $003C USB Control Register 1 (UCR1) Read: T1SEQ ENDADD TX1E FRESUM TP1SIZ3 TP1SIZ2 TP1SIZ1 TP1SIZ0 Write: Reset: 0 0 0 0 0 0 0 0 $003D USB Status Register (USR) Read: RSEQ SETUP RPSIZ3 RPSIZ2 RPSIZ1 RPSIZ0 Write: Reset: X X — — X X X X $003E Unimplemented Read: Write: $003F Unimplemented Read: Write: $FE00 Break Status Register (BSR) Read: RR R R R R SBSW R Write: Note NOTE: Writing a logic 0 clears SBSW. Reset: 0 $FE01 Reset Status Register (RSR) Read: POR PIN COP ILOP ILAD USB 0 0 Write: POR: 1 0 0 0 0 0 0 0 $FE02 Reserved Read: RR R R R R R R Write: Addr. Name Bit 7 6 5 4 3 2 1 Bit 0 = Unimplemented R = Reserved X= Indeterminate Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 8) |
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