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ISL6262A Datasheet(PDF) 1 Page - Renesas Technology Corp |
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ISL6262A Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 28 page  FN6343 Rev 1.00 Page 1 of 28 December 23, 2008 FN6343 Rev 1.00 December 23, 2008 ISL6262A Two-Phase Core Controller (Santa Rosa, IMVP-6+) DATASHEET The ISL6262A is a two-phase buck converter regulator implementing Intel® IMVP-6+ protocol with embedded gate drivers. The two-phase buck converter uses two interleaved channels to effectively double the output voltage ripple frequency, and thereby reduce output voltage ripple amplitude with fewer components; lower component cost; reduced power dissipation; and smaller real estate area. The heart of the ISL6262A is the patented R3 Technology™, Intersil’s Robust Ripple Regulator modulator. Compared with the traditional multiphase buck regulator, the R3 Technology™ has the fastest transient response. This is due to the R3 modulator commanding variable switching frequency during a load transient. Intel® Mobile Voltage Positioning (IMVP) is a smart voltage regulation technology, which effectively reduces power dissipation in Intel® Pentium processors. To boost battery life, the ISL6262A supports DPRSLPVR (deeper sleep), DPRSTP# and PSI# functions, and maximizes the efficiency via automatically enabling different phase operation modes. At heavy load operation of the active mode, the regulator commands the two phase continuous conduction mode (CCM) operation. While the PSI# is asserted with medium load in active mode, the ISL6262A smoothly disables one phase and operates in one-phase CCM. When the CPU enters deeper sleep mode, the ISL6262A enables diode emulation to maximize the efficiency at light load. For better system power management of the portable computer, the ISL6262A also provides a CPU power monitor output. The analog output at the power monitor pin can be fed into an A/D converter to report instantaneous or average CPU power. A 7-bit digital-to-analog converter (DAC) allows dynamic adjustment of the core output voltage from 0.300V to 1.500V. A 0.5% system accuracy of the core output voltage over-temperature is achieved by the ISL6262A. A unity-gain differential amplifier is provided for remote CPU die sensing. This allows the voltage on the CPU die to be accurately measured and regulated per Intel® IMVP-6+ specifications. Current sensing can be realized using either lossless inductor DCR sensing, or precision resistor sensing. A single NTC thermistor network thermally compensates the gain and the time constant of the DCR variations. Features • Precision Two/One-phase CORE Voltage Regulator - 0.5% System Accuracy Over-Temperature - Enhanced Load Line Accuracy • Internal Gate Driver with 2A Driving Capability • Dynamic Phase Adding/Dropping • Microprocessor Voltage Identification Input - 7-Bit VID Input - 0.300V to 1.500V in 12.5mV Steps - Support VID Change On-the-Fly • Multiple Current Sensing Schemes Supported - Lossless Inductor DCR Current Sensing - Precision Resistive Current Sensing • CPU Power Monitor • Thermal Monitor • User Programmable Switching Frequency • Differential Remote CPU Die Voltage Sensing • Static and Dynamic Current Sharing • Overvoltage, Undervoltage, and Overcurrent Protection • Pb-Free (RoHS Compliant) Ordering Information PART NUMBER (Note) PART MARKING TEMP. RANGE (°C) PACKAGE (Pb-Free) PKG. DWG. # ISL6262ACRZ ISL6262 ACRZ -10 to +100 48 Ld 7x7 QFN L48.7x7 ISL6262ACRZ-T* ISL6262 ACRZ -10 to +100 48 Ld 7x7 QFN L48.7x7 ISL6262AIRZ ISL6262 AIRZ -40 to +100 48 Ld 7x7 QFN L48.7x7 ISL6262AIRZ-T* ISL6262 AIRZ -40 to +100 48 Ld 7x7 QFN L48.7x7 *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. |
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