X80120, X80121

FN8151 Rev 0.00

Page 13 of 17

January 20, 2005

can stay LOW or return HIGH. The STOP condition also places

the device into the Standby power mode after a read

sequence.

Serial Acknowledge

Acknowledge is a software convention used to indicate

successful data transfer. The transmitting device, either master

or slave, will release the bus after transmitting eight bits.

During the ninth clock cycle, the receiver will pull the SDA line

LOW to acknowledge that it received the eight bits of data (See

Figure 12).

The device will respond with an acknowledge after recognition

of a START condition and if the correct Device Identifier and

Select bits are contained in the Slave Address Byte. If a write

operation is selected, the device will respond with an

acknowledge after the receipt of each subsequent eight bit

word. The device will acknowledge all incoming data and

address bytes, except for the Slave Address Byte when the

Device Identifier and/or Select bits are incorrect.

The device does not acknowledge any instructions following a

non-volatile write operation, unless the VP pin has the

recommended programming voltage applied for the duration of

the write cycle.

In the read mode, the device will transmit eight bits of data,

release the SDA line, then monitor the line for an acknowledge.

If an acknowledge is detected and no STOP condition is

generated by the master, the device will continue to transmit

data. The device will terminate further data transmissions if an

acknowledge is not detected. The master must then issue a

STOP condition to return the device to Standby mode and

place the device into a known state.

Device Addressing

Addressing Protocol Overview

Depending upon the operation to be performed on each of

these individual parts, a 1, 2 or 3 Byte protocol is used. All

operations however must begin with the Slave Address Byte

being clocked into the SMBus port on the SCL and SDA pins.

The Slave address selects the part of the device to be

addressed, and specifies if a Read or Write operation is to be

performed.

Slave Address Byte

Following a START condition, the master must output a Slave

Address Byte. This byte consists of three parts:

• The Device Type Identifier which consists of the most

significant four bits of the Slave Address (SA7 - SA4). The

Device Type Identifier MUST be set to 1010 in order to

select the device.

• The next two bits (SA3 - SA2) are slave address bits. The

bits received via the SMBus are compared to A0 and A1 pins

and must match or the communication is aborted.

• The next bit, SA1, selects the device memory sector. There

are two addressable sectors: the memory array and the

control, fault detection and remote shutdown registers.

• The Least Significant Bit of the Slave Address (SA0) Byte is

the R/W bit. This bit defines the operation to be performed.

When the R/W bit is “1”, then a READ operation is selected.

A “0” selects a WRITE operation (Refer to Figure 13).

SCL

SDA

Start

Stop

FIGURE 11. VALID START AND STOP CONDITIONS

Data Output from

Transmitter

Data Output from

Receiver

8

1

9

Start

Acknowledge

SCL from

Master

FIGURE 12. ACKNOWLEDGE RESPONSE FROM RECEIVER