UPD6P9 datasheet(5/45 Pages) RENESAS

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µPD6P9

Data Sheet U15144EJ1V1DS

BLOCK DIAGRAM

Item

µPD6P9

µPD6P9M1

µPD6P9M3

ROM capacity

4074

× 10 bits

One-time PROM

RAM capacity

128

× 4 bits

Stack

1 level (shared with RF of RAM)

I/O pins

Key input (KI):

4 pins

Key I/O (KI/O):

8 pins

Key expansion input (S0, S1, S2):

3 pins

Remote control transmission display output (LED):

1 pin (shared with S1 pin)

Number of keys

32 keys

56 keys (when expanded by key expansion input)

Clock frequency

Ceramic oscillation

fX = 3.5 to 4.5 MHz

Instruction execution time

µs (@ fX = 4 MHz)

Carrier frequency

The high-level and low-level width can be set separately from 250 ns to 64

µs (@ fX = 4 MHz

operation) via modulo registers

Timer

9-bit programmable timer: 1 channel, timer clock: fX/64

POC circuit

On chip

RAM retention detector

On chip

Capacitor for oscillation

Not available

Supply voltage

VDD = 2.2 to 3.6 V

Operating ambient

TA = –40 to +85

°C

temperature

Package

20-pin plastic SSOP (7.62 mm (300))

KI0 to KI3

KI/O0 to KI/O7

S0, S1/LED, S2

Port KI

Port KI/O

Port S

RAM

System

control

Carrier

generator

9-bit

timer

CPU

core

XIN

XOUT

VDD

GND

REM

S1/LED

One-

time

PROM

LIST OF FUNCTIONS

UPD6P9 Datasheet(PDF) 5 Page - Renesas Technology Corp

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