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5387B–HIREL–07/05

PC7447A [Preliminary]

6.3

Recommended Operating Conditions

Notes:

1. These are the recommended and tested operating conditions. Proper device operation outside of these conditions is not

guaranteed.

Figure 6-1.

Overshoot/Undershoot Voltage

The PC7447A provides several I/O voltages to support both compatibility with existing systems

and migration to future systems. The PC7447A core voltage must always be provided at a nom-

voltage threshold for each bus is selected by sampling the state of the voltage select pins at the

negation of the signal HRESET. The output voltage will swing from GND to the maximum volt-

settings. Because these settings may change in future products, it is recommended that BVSEL

be configured using resistor options, jumpers, or some other flexible means, with the capability

to reconfigure the termination of this signal in the future if necessary.

Table 6-2.

Symbol

Characteristic

Recommended Value

Unit

Min

Max

Core supply voltage

1.3V ±50 mV or 1.1V ±50 mV

V

AV

DD

(2)

PLL supply voltage

1.3V ±50 mV or 1.1V ±50 mV

V

Processor bus supply

voltage

BVSEL = 0

1.8V ±5%

V

BVSEL = HRESET or

OV

DD

2.5V ±5%

Input voltage

Processor bus

GND

V

JTAG signals

GND

T

j

Die-junction temperature

-55

125

°C

GND

GND – 0.3V

GND – 0.7V

Not to exceed 10% of tSYSCLK

OVDD + 20%

OVDD + 5%

OVDD

VIH

VIL