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UPD17062 Datasheet(PDF) 59 Page - Renesas Technology Corp |
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UPD17062 Datasheet(HTML) 59 Page - Renesas Technology Corp |
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59 / 298 page  57 µPD17062 8.5 INDEX REGISTER (IX) AND DATA MEMORY ROW ADDRESS POINTER (MP) 8.5.1 Configuration of Index Register and Data Memory Row Address Pointer As shown in Fig. 8-1, the index register consists of 11 bits, including the three low-order bits, of 7AH (IXH) of the system register, 7BH, and 7CH (IXM, IXL). The index register is used to indirectly specify a data memory address. The data memory row address pointer consists of 7 bits, including the three low-order bits of 7AH (MPH) and 7BH (MPL). This means that the seven high-order bits of the index register and data memory row address pointer are shared. The four high-order bits of the index register, i.e., the four high-order bits of the data memory row address pointer (7AH b2-b0, 7BH b3), of µPD17062 are fixed at 0. |
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