| Electronic Components Datasheet Search |
|
AT89C5132-ROTUL Datasheet(PDF) 101 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT89C5132-ROTUL Datasheet(HTML) 101 Page - ATMEL Corporation |
|
101 / 181 page ![]() 101 4173D–USB–02/06 AT89C5132 Reset Value = 0000 0011b Table 83. MMMSK Register MMMSK (S:DFh) – MMC Interrupt Mask Register 6EORI End of Response Interrupt Flag Set by hardware at the end of response reception. Cleared when reading MMINT. 5EOCI End of Command Interrupt Flag Set by hardware at the end of command transmission. Clear when reading MMINT. 4EOFI End of Frame Interrupt Flag Set by hardware at the end of frame (stream or block) transfer. Clear when reading MMINT. 3F2FI FIFO 2 Full Interrupt Flag Set by hardware when second FIFO becomes full. Cleared by hardware when second FIFO becomes empty. 2F1FI FIFO 1 Full Interrupt Flag Set by hardware when first FIFO becomes full. Cleared by hardware when first FIFO becomes empty. 1F2EI FIFO 2 Empty Interrupt Flag Set by hardware when second FIFO becomes empty. Cleared by hardware when second FIFO becomes full. 0F1EI FIFO 1 Empty Interrupt Flag Set by hardware when first FIFO becomes empty. Cleared by hardware when first FIFO becomes full. 76 543 210 MCBM EORM EOCM EOFM F2FM F1FM F2EM F1EM Bit Number Bit Mnemonic Description 7MCBM MMC Card Busy Interrupt Mask Bit Set to prevent MCBI flag from generating an MMC interrupt. Clear to allow MCBI flag to generate an MMC interrupt. 6EORM End Of Response Interrupt Mask Bit Set to prevent EORI flag from generating an MMC interrupt. Clear to allow EORI flag to generate an MMC interrupt. 5EOCM End Of Command Interrupt Mask Bit Set to prevent EOCI flag from generating an MMC interrupt. Clear to allow EOCI flag to generate an MMC interrupt. 4EOFM End Of Frame Interrupt Mask Bit Set to prevent EOFI flag from generating an MMC interrupt. Clear to allow EOFI flag to generate an MMC interrupt. 3F2FM FIFO 2 Full Interrupt Mask Bit Set to prevent F2FI flag from generating an MMC interrupt. Clear to allow F2FI flag to generate an MMC interrupt. Bit Number Bit Mnemonic Description |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |