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TCS3530 Datasheet(PDF) 81 Page - OSRAM GmbH |
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TCS3530 Datasheet(HTML) 81 Page - OSRAM GmbH |
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81 / 106 page  Page 80 Datasheet, Public Document Feedback [v3-00] 2023-Jun-23 TCS3530 − Register O ver view Note(s): 1. Return to the Register Map (0xF2). FIFO_THR Register Figure 117: FIFO_THR Note(s): 1. Return to the Register Map (0xF3). 2 VSYNC_MODE 0 R/W Select which input to use for vsync Value ID Meaning 0 pad_ vsync_ trigger Use VSYNC/GPIO/INT input as vsync start trigger 1 sw_vsync_ trigger Use VSYNC_ CONTROL.sw_vsync_ trigger as vsync trigger 1 VSYNC_SELECT 0 R/W Select which input to use for vsync Value ID Meaning 0 vsync_gpio Use VSYNC/GPIO input 1int Use INT input 0 VSYNC_INVERT 0 R/W If enabled then the selected vsync input is inverted. Value ID Meaning 0 do_not_ invert Do not invert 1invert Do invert Addr: 0xF3 FIFO_THR Bit Field Default Access Bit Description 7:0 FIFO_THR[10:3] 127 R/W If FIFO_LVL > FIFO_THR, an FIFO interrupt FINT is raised. See CFG2 and FIFO_LVL[2:0] for lsbs. Addr: 0xF2 VSYNC_CFG Bit Field Default Access Bit Description |
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